From d717909f5ab7b6ffff2e2f6122aff2d20c71f37e Mon Sep 17 00:00:00 2001 From: Sean Bruno Date: Thu, 12 Feb 2009 03:05:42 +0000 Subject: [PATCH] Update comments around various structs. Add speeds S800, S1600 and S3200 --- sys/dev/firewire/firewire.h | 7 +++++++ sys/dev/firewire/fwohcireg.h | 17 ++++++++--------- sys/dev/firewire/fwphyreg.h | 12 ++++++++++++ 3 files changed, 27 insertions(+), 9 deletions(-) diff --git a/sys/dev/firewire/firewire.h b/sys/dev/firewire/firewire.h index 39d8fd14a6b8..619f50094b57 100644 --- a/sys/dev/firewire/firewire.h +++ b/sys/dev/firewire/firewire.h @@ -99,9 +99,16 @@ struct fw_reg_req_t { #define FWRCODE_ER_TYPE 6 #define FWRCODE_ER_ADDR 7 +/* + * Defined 1394a-2000 + * Table 5B-1 + */ #define FWSPD_S100 0 #define FWSPD_S200 1 #define FWSPD_S400 2 +#define FWSPD_S800 3 +#define FWSPD_S1600 4 +#define FWSPD_S3200 5 #define FWP_TL_VALID (1 << 7) diff --git a/sys/dev/firewire/fwohcireg.h b/sys/dev/firewire/fwohcireg.h index 32b029c7455d..64bbf4f1cff8 100644 --- a/sys/dev/firewire/fwohcireg.h +++ b/sys/dev/firewire/fwohcireg.h @@ -411,32 +411,31 @@ struct fwohci_trailer{ #define OHCI_CNTL_PHYPKT (0x1 << 10) #define OHCI_CNTL_SID (0x1 << 9) +/* + * defined in OHCI 1.1 + * chapter 6.1 + */ #define OHCI_INT_DMA_ATRQ (0x1 << 0) #define OHCI_INT_DMA_ATRS (0x1 << 1) #define OHCI_INT_DMA_ARRQ (0x1 << 2) #define OHCI_INT_DMA_ARRS (0x1 << 3) #define OHCI_INT_DMA_PRRQ (0x1 << 4) #define OHCI_INT_DMA_PRRS (0x1 << 5) -#define OHCI_INT_DMA_IT (0x1 << 6) -#define OHCI_INT_DMA_IR (0x1 << 7) -#define OHCI_INT_PW_ERR (0x1 << 8) -#define OHCI_INT_LR_ERR (0x1 << 9) - +#define OHCI_INT_DMA_IT (0x1 << 6) +#define OHCI_INT_DMA_IR (0x1 << 7) +#define OHCI_INT_PW_ERR (0x1 << 8) +#define OHCI_INT_LR_ERR (0x1 << 9) #define OHCI_INT_PHY_SID (0x1 << 16) #define OHCI_INT_PHY_BUS_R (0x1 << 17) - #define OHCI_INT_REG_FAIL (0x1 << 18) - #define OHCI_INT_PHY_INT (0x1 << 19) #define OHCI_INT_CYC_START (0x1 << 20) #define OHCI_INT_CYC_64SECOND (0x1 << 21) #define OHCI_INT_CYC_LOST (0x1 << 22) #define OHCI_INT_CYC_ERR (0x1 << 23) - #define OHCI_INT_ERR (0x1 << 24) #define OHCI_INT_CYC_LONG (0x1 << 25) #define OHCI_INT_PHY_REG (0x1 << 26) - #define OHCI_INT_EN (0x1 << 31) #define IP_CHANNELS 0x0234 diff --git a/sys/dev/firewire/fwphyreg.h b/sys/dev/firewire/fwphyreg.h index 77a006ed3c54..c54881e582b4 100644 --- a/sys/dev/firewire/fwphyreg.h +++ b/sys/dev/firewire/fwphyreg.h @@ -34,6 +34,10 @@ * $FreeBSD$ */ +/* + * IEEE 1394a + * Figure 5B - 1 + */ struct phyreg_base { #if BYTE_ORDER == BIG_ENDIAN uint8_t phy_id:6, @@ -100,6 +104,10 @@ struct phyreg_base { #endif }; +/* + * IEEE 1394a + * Figure 5B - 2 + */ struct phyreg_page0 { #if BYTE_ORDER == BIG_ENDIAN uint8_t astat:2, @@ -160,6 +168,10 @@ struct phyreg_page0 { #endif }; +/* + * IEEE 1394a + * Figure 5B - 3 + */ struct phyreg_page1 { uint8_t compliance; uint8_t :8;