From d7766b45867aa1acc7b615a45503734a7c007eed Mon Sep 17 00:00:00 2001 From: Oleksandr Tymoshenko Date: Fri, 19 Jun 2009 05:00:17 +0000 Subject: [PATCH] - Flush PCI register write before delay Spotted by: Pyun YongHyeon --- sys/mips/atheros/ar71xx_pci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sys/mips/atheros/ar71xx_pci.c b/sys/mips/atheros/ar71xx_pci.c index de786e4a8d51..345091a188aa 100644 --- a/sys/mips/atheros/ar71xx_pci.c +++ b/sys/mips/atheros/ar71xx_pci.c @@ -296,13 +296,13 @@ ar71xx_pci_attach(device_t dev) reset = ATH_READ_REG(AR71XX_RST_RESET); reset |= (RST_RESET_PCI_CORE | RST_RESET_PCI_BUS); ATH_WRITE_REG(AR71XX_RST_RESET, reset); - DELAY(1000); ATH_READ_REG(AR71XX_RST_RESET); + DELAY(1000); reset &= ~(RST_RESET_PCI_CORE | RST_RESET_PCI_BUS); ATH_WRITE_REG(AR71XX_RST_RESET, reset); - DELAY(1000); ATH_READ_REG(AR71XX_RST_RESET); + DELAY(1000); /* Init PCI windows */ ATH_WRITE_REG(AR71XX_PCI_WINDOW0, PCI_WINDOW0_ADDR);