From d8371cb18ee1b5560883190875544152896ca5b0 Mon Sep 17 00:00:00 2001
From: John Baldwin <jhb@FreeBSD.org>
Date: Wed, 18 Oct 2017 17:23:16 +0000
Subject: [PATCH] Remove CPU_HAVEFPU.

Instead, use a runtime decision to handle COP1 traps.  If floating point
support is present in the current CPU, enable saving of the floating point
state.  If support is not present, fail with SIGILL.

Reviewed by:	imp, br
Sponsored by:	DARPA / AFRL
Differential Revision:	https://reviews.freebsd.org/D12707
---
 sys/conf/kern.mk      |  3 ---
 sys/conf/options.mips |  1 -
 sys/mips/mips/trap.c  | 15 ++++++++-------
 3 files changed, 8 insertions(+), 11 deletions(-)

diff --git a/sys/conf/kern.mk b/sys/conf/kern.mk
index 844510742cb6..204b8203d6e4 100644
--- a/sys/conf/kern.mk
+++ b/sys/conf/kern.mk
@@ -184,9 +184,6 @@ CFLAGS.gcc+=	-mcall-aixdesc
 .if ${MACHINE_CPUARCH} == "mips"
 CFLAGS+=	-msoft-float
 INLINE_LIMIT?=	8000
-.if ${MACHINE_ARCH:Mmips*hf} != ""
-CFLAGS+= -DCPU_HAVEFPU
-.endif
 .endif
 
 #
diff --git a/sys/conf/options.mips b/sys/conf/options.mips
index 92e830ba341b..3cbeba993528 100644
--- a/sys/conf/options.mips
+++ b/sys/conf/options.mips
@@ -39,7 +39,6 @@ CPU_PROAPTIV	opt_global.h
 CPU_MIPS32	opt_global.h
 CPU_MIPS64	opt_global.h
 CPU_SENTRY5	opt_global.h
-CPU_HAVEFPU	opt_global.h
 CPU_SB1 	opt_global.h
 CPU_CNMIPS	opt_global.h
 CPU_RMI		opt_global.h
diff --git a/sys/mips/mips/trap.c b/sys/mips/mips/trap.c
index 0f1508c7f2d3..016257be7c13 100644
--- a/sys/mips/mips/trap.c
+++ b/sys/mips/mips/trap.c
@@ -75,6 +75,7 @@ __FBSDID("$FreeBSD$");
 
 #include <machine/trap.h>
 #include <machine/cpu.h>
+#include <machine/cpuinfo.h>
 #include <machine/pte.h>
 #include <machine/pmap.h>
 #include <machine/md_var.h>
@@ -970,12 +971,13 @@ dofault:
 	case T_COP_UNUSABLE + T_USER:
 		cop = (trapframe->cause & MIPS_CR_COP_ERR) >> MIPS_CR_COP_ERR_SHIFT;
 		if (cop == 1) {
-#if !defined(CPU_HAVEFPU)
-		/* FP (COP1) instruction */
-			log_illegal_instruction("COP1_UNUSABLE", trapframe);
-			i = SIGILL;
-			break;
-#else
+			/* FP (COP1) instruction */
+			if (cpuinfo.fpu_id == 0) {
+				log_illegal_instruction("COP1_UNUSABLE",
+				    trapframe);
+				i = SIGILL;
+				break;
+			}
 			addr = trapframe->pc;
 			MipsSwitchFPState(PCPU_GET(fpcurthread), td->td_frame);
 			PCPU_SET(fpcurthread, td);
@@ -986,7 +988,6 @@ dofault:
 #endif
 			td->td_md.md_flags |= MDTD_FPUSED;
 			goto out;
-#endif
 		}
 #ifdef	CPU_CNMIPS
 		else  if (cop == 2) {