Stop isadma from abusing the B_READ, B_RAW and B_WRITE flags.
Define ISADMA_{READ,WRITE,RAW} macros with the same numeric values as the B_{READ,WRITE,RAW} and use them instead throughout.
This commit is contained in:
parent
3f30603cfb
commit
d8b47cbb70
@ -50,7 +50,6 @@
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/buf.h> /* B_READ and B_RAW */
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#include <sys/malloc.h>
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#include <sys/bus.h>
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#include <vm/vm.h>
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@ -243,15 +242,15 @@ static void isa_dmastart_cb(void *arg, bus_dma_segment_t *segs, int nseg,
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*/
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/* set dma channel mode, and reset address ff */
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/* If B_RAW flag is set, then use autoinitialise mode */
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if (flags & B_RAW) {
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if (flags & B_READ)
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/* If ISADMA_RAW flag is set, then use autoinitialise mode */
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if (flags & ISADMA_RAW) {
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if (flags & ISADMA_READ)
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outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
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else
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outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
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}
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else
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if (flags & B_READ)
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if (flags & ISADMA_READ)
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outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
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else
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outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
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@ -276,15 +275,15 @@ static void isa_dmastart_cb(void *arg, bus_dma_segment_t *segs, int nseg,
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*/
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/* set dma channel mode, and reset address ff */
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/* If B_RAW flag is set, then use autoinitialise mode */
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if (flags & B_RAW) {
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if (flags & B_READ)
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/* If ISADMA_RAW flag is set, then use autoinitialise mode */
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if (flags & ISADMA_RAW) {
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if (flags & ISADMA_READ)
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outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
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else
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outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
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}
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else
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if (flags & B_READ)
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if (flags & ISADMA_READ)
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outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
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else
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outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
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@ -338,7 +337,7 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
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dma_busy |= (1 << chan);
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if (flags & B_RAW) {
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if (flags & ISADMA_RAW) {
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dma_auto_mode |= (1 << chan);
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} else {
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dma_auto_mode &= ~(1 << chan);
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@ -49,7 +49,6 @@
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/buf.h> /* B_READ and B_RAW */
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#include <sys/malloc.h>
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#include <vm/vm.h>
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#include <vm/vm_param.h>
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@ -244,7 +243,7 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
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newaddr = dma_bouncebuf[chan];
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/* copy bounce buffer on write */
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if (!(flags & B_READ))
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if (!(flags & ISADMA_READ))
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bcopy(addr, newaddr, nbytes);
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addr = newaddr;
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}
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@ -252,7 +251,7 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
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/* translate to physical */
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phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
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if (flags & B_RAW) {
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if (flags & ISADMA_RAW) {
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dma_auto_mode |= (1 << chan);
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} else {
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dma_auto_mode &= ~(1 << chan);
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@ -265,15 +264,15 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
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*/
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/* set dma channel mode, and reset address ff */
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/* If B_RAW flag is set, then use autoinitialise mode */
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if (flags & B_RAW) {
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if (flags & B_READ)
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/* If ISADMA_RAW flag is set, then use autoinitialise mode */
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if (flags & ISADMA_RAW) {
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if (flags & ISADMA_READ)
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outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
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else
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outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
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}
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else
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if (flags & B_READ)
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if (flags & ISADMA_READ)
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outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
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else
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outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
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@ -298,15 +297,15 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
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*/
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/* set dma channel mode, and reset address ff */
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/* If B_RAW flag is set, then use autoinitialise mode */
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if (flags & B_RAW) {
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if (flags & B_READ)
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/* If ISADMA_RAW flag is set, then use autoinitialise mode */
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if (flags & ISADMA_RAW) {
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if (flags & ISADMA_READ)
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outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
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else
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outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
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}
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else
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if (flags & B_READ)
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if (flags & ISADMA_READ)
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outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
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else
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outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
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@ -348,7 +347,7 @@ isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
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if (dma_bounced & (1 << chan)) {
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/* copy bounce buffer on read */
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if (flags & B_READ)
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if (flags & ISADMA_READ)
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bcopy(dma_bouncebuf[chan], addr, nbytes);
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dma_bounced &= ~(1 << chan);
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@ -38,6 +38,11 @@
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#define _I386_ISA_ISA_DMA_H_
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#ifdef _KERNEL
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#define ISADMA_READ 0x00100000
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#define ISADMA_WRITE 0
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#define ISADMA_RAW 0x00080000
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void isa_dmacascade __P((int chan));
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void isa_dmadone __P((int flags, caddr_t addr, int nbytes, int chan));
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void isa_dmainit __P((int chan, u_int bouncebufsize));
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@ -456,8 +456,8 @@ sb16_swap(void *v, int dir)
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t = sb->pch.buffer->chan;
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sb->pch.buffer->chan = sb->rch.buffer->chan;
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sb->rch.buffer->chan = t;
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sb->pch.buffer->dir = B_WRITE;
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sb->rch.buffer->dir = B_READ;
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sb->pch.buffer->dir = ISADMA_WRITE;
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sb->rch.buffer->dir = ISADMA_READ;
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}
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}
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}
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@ -456,8 +456,8 @@ sb16_swap(void *v, int dir)
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t = sb->pch.buffer->chan;
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sb->pch.buffer->chan = sb->rch.buffer->chan;
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sb->rch.buffer->chan = t;
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sb->pch.buffer->dir = B_WRITE;
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sb->rch.buffer->dir = B_READ;
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sb->pch.buffer->dir = ISADMA_WRITE;
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sb->rch.buffer->dir = ISADMA_READ;
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}
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}
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}
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@ -456,8 +456,8 @@ sb16_swap(void *v, int dir)
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t = sb->pch.buffer->chan;
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sb->pch.buffer->chan = sb->rch.buffer->chan;
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sb->rch.buffer->chan = t;
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sb->pch.buffer->dir = B_WRITE;
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sb->rch.buffer->dir = B_READ;
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sb->pch.buffer->dir = ISADMA_WRITE;
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sb->rch.buffer->dir = ISADMA_READ;
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}
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}
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}
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@ -840,14 +840,14 @@ buf_isadma(snd_dbuf *b, int go)
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switch (go) {
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case PCMTRIG_START:
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DEB(printf("buf 0x%p ISA DMA started\n", b));
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isa_dmastart(b->dir | B_RAW, b->buf,
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isa_dmastart(b->dir | ISADMA_RAW, b->buf,
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b->bufsize, b->chan);
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break;
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case PCMTRIG_STOP:
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case PCMTRIG_ABORT:
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DEB(printf("buf 0x%p ISA DMA stopped\n", b));
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isa_dmastop(b->chan);
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isa_dmadone(b->dir | B_RAW, b->buf, b->bufsize,
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isa_dmadone(b->dir | ISADMA_RAW, b->buf, b->bufsize,
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b->chan);
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break;
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}
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@ -1050,7 +1050,7 @@ chn_setdir(pcm_channel *c, int dir)
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c->direction = dir;
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r = c->setdir(c->devinfo, c->direction);
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if (!r && ISA_DMA(&c->buffer))
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c->buffer.dir = (dir == PCMDIR_PLAY)? B_WRITE : B_READ;
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c->buffer.dir = (dir == PCMDIR_PLAY)? ISADMA_WRITE : ISADMA_READ;
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return r;
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}
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@ -299,7 +299,7 @@ dma_restart(struct asc_unit *scu)
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unsigned char al=scu->cmd_byte;
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if (geomtab[scu->geometry].g_res==0) {/* color */
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isa_dmastart(B_READ, scu->sbuf.base+scu->sbuf.wptr,
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isa_dmastart(ISADMA_READ, scu->sbuf.base+scu->sbuf.wptr,
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scu->linesize + 90 /* XXX */ , scu->dma_num);
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/*
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* looks like we have to set and then clear this
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@ -312,7 +312,7 @@ dma_restart(struct asc_unit *scu)
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outb( ASC_CMD, al &= 0xfb );
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scu->cmd_byte = al;
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} else { /* normal */
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isa_dmastart(B_READ, scu->sbuf.base+scu->sbuf.wptr,
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isa_dmastart(ISADMA_READ, scu->sbuf.base+scu->sbuf.wptr,
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scu->linesize, scu->dma_num);
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/*** this is done in sub_20, after dmastart ? ***/
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#if 0
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@ -513,7 +513,7 @@ ascintr(int unit)
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outb( ASC_CMD, ASC_STANDBY);
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scu->flags &= ~DMA_ACTIVE;
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/* bounce buffers... */
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isa_dmadone(B_READ, scu->sbuf.base+scu->sbuf.wptr,
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isa_dmadone(ISADMA_READ, scu->sbuf.base+scu->sbuf.wptr,
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scu->linesize, scu->dma_num);
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scu->sbuf.wptr += scu->linesize;
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if (scu->sbuf.wptr >= scu->sbuf.size) scu->sbuf.wptr=0;
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@ -327,7 +327,7 @@ buffer_read(struct gsc_unit *scu)
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outb( scu->clrp, 0 );
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stb = inb( scu->stat );
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isa_dmastart(B_READ, scu->sbuf.base, scu->sbuf.size, scu->channel);
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isa_dmastart(ISADMA_READ, scu->sbuf.base, scu->sbuf.size, scu->channel);
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chan_bit = 0x01 << scu->channel;
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@ -347,7 +347,7 @@ buffer_read(struct gsc_unit *scu)
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break;
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}
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splx(sps);
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isa_dmadone(B_READ, scu->sbuf.base, scu->sbuf.size, scu->channel);
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isa_dmadone(ISADMA_READ, scu->sbuf.base, scu->sbuf.size, scu->channel);
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outb( scu->clrp, 0 );
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if(res != SUCCESS)
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@ -194,7 +194,7 @@ static struct old_isa_driver old_drivers[] = {
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{ INTR_TYPE_TTY, &stlidriver },
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#endif
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#if NLORAN > 0
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{ INTR_TYPE_TTY, &lorandriver },
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{ INTR_TYPE_TTY | INTR_TYPE_FAST, &lorandriver },
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#endif
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/* BIO */
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@ -49,7 +49,6 @@
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/buf.h> /* B_READ and B_RAW */
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#include <sys/malloc.h>
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#include <vm/vm.h>
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#include <vm/vm_param.h>
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@ -244,7 +243,7 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
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newaddr = dma_bouncebuf[chan];
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/* copy bounce buffer on write */
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if (!(flags & B_READ))
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if (!(flags & ISADMA_READ))
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bcopy(addr, newaddr, nbytes);
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addr = newaddr;
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}
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@ -252,7 +251,7 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
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/* translate to physical */
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phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
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if (flags & B_RAW) {
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if (flags & ISADMA_RAW) {
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dma_auto_mode |= (1 << chan);
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} else {
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dma_auto_mode &= ~(1 << chan);
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@ -265,15 +264,15 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
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*/
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/* set dma channel mode, and reset address ff */
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/* If B_RAW flag is set, then use autoinitialise mode */
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if (flags & B_RAW) {
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if (flags & B_READ)
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/* If ISADMA_RAW flag is set, then use autoinitialise mode */
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if (flags & ISADMA_RAW) {
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if (flags & ISADMA_READ)
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outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
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else
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outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
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}
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else
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if (flags & B_READ)
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if (flags & ISADMA_READ)
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outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
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else
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outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
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@ -298,15 +297,15 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
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*/
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/* set dma channel mode, and reset address ff */
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/* If B_RAW flag is set, then use autoinitialise mode */
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if (flags & B_RAW) {
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if (flags & B_READ)
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/* If ISADMA_RAW flag is set, then use autoinitialise mode */
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if (flags & ISADMA_RAW) {
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if (flags & ISADMA_READ)
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outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
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else
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outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
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}
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else
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if (flags & B_READ)
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if (flags & ISADMA_READ)
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outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
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else
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outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
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@ -348,7 +347,7 @@ isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
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if (dma_bounced & (1 << chan)) {
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/* copy bounce buffer on read */
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if (flags & B_READ)
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if (flags & ISADMA_READ)
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bcopy(dma_bouncebuf[chan], addr, nbytes);
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dma_bounced &= ~(1 << chan);
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@ -38,6 +38,11 @@
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#define _I386_ISA_ISA_DMA_H_
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#ifdef _KERNEL
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#define ISADMA_READ 0x00100000
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#define ISADMA_WRITE 0
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#define ISADMA_RAW 0x00080000
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void isa_dmacascade __P((int chan));
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void isa_dmadone __P((int flags, caddr_t addr, int nbytes, int chan));
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void isa_dmainit __P((int chan, u_int bouncebufsize));
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@ -25,6 +25,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#include <i386/isa/sound/sound_config.h>
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@ -1103,14 +1104,14 @@ DMAbuf_start_dma(int dev, u_long physaddr, int count, int dma_mode)
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#ifndef PSEUDO_DMA_AUTOINIT
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if (audio_devs[dev]->flags & DMA_AUTOMODE) {
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/* Auto restart mode. Transfer the whole buffer */
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isa_dmastart(B_RAW | ((dma_mode == 0) ? B_READ : B_WRITE),
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isa_dmastart(ISADMA_RAW | ((dma_mode == 0) ? ISADMA_READ : ISADMA_WRITE),
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(caddr_t) (void *) (uintptr_t) dmap->raw_buf_phys,
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dmap->bytes_in_use, chan);
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} else
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#endif
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{
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isa_dmastart((dma_mode == 0) ? B_READ : B_WRITE,
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isa_dmastart((dma_mode == 0) ? ISADMA_READ : ISADMA_WRITE,
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(caddr_t) (void *) (uintptr_t) physaddr, count, chan);
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}
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return count;
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@ -148,7 +148,7 @@ typedef struct {
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void *dmavaddr; /* virtual address of dma i/o buffer */
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unsigned dmatotal; /* size of i/o buffer */
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unsigned dmaflags; /* i/o direction, B_READ or B_WRITE */
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unsigned dmaflags; /* i/o direction, ISADMA_READ or ISADMA_WRITE */
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unsigned dmacount; /* resulting length of dma i/o */
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wtstatus_t error; /* status of controller */
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@ -566,7 +566,7 @@ wtstrategy (struct buf *bp)
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t->flags &= ~TPEXCEP;
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s = splbio ();
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if (wtstart (t, bp->b_flags, bp->b_data, bp->b_bcount)) {
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if (wtstart (t, bp->b_flags & B_READ ? ISADMA_READ : ISADMA_WRITE, bp->b_data, bp->b_bcount)) {
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wtwait (t, 0, (bp->b_flags & B_READ) ? "wtread" : "wtwrite");
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bp->b_resid -= t->dmacount;
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}
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@ -637,7 +637,7 @@ wtintr (int u)
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/*
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* Clean up dma.
|
||||
*/
|
||||
if ((t->dmaflags & B_READ) && (t->dmatotal - t->dmacount) < t->bsize) {
|
||||
if ((t->dmaflags & ISADMA_READ) && (t->dmatotal - t->dmacount) < t->bsize) {
|
||||
/* If reading short block, copy the internal buffer
|
||||
* to the user memory. */
|
||||
isa_dmadone (t->dmaflags, t->buf, t->bsize, t->chan);
|
||||
@ -654,7 +654,7 @@ wtintr (int u)
|
||||
*/
|
||||
if (! (s & t->NOEXCEP)) {
|
||||
TRACE (("i/o exception\n"));
|
||||
wtsense (t, 1, (t->dmaflags & B_READ) ? TP_WRP : 0);
|
||||
wtsense (t, 1, (t->dmaflags & ISADMA_READ) ? TP_WRP : 0);
|
||||
if (t->error.err & (TP_EOM | TP_FIL))
|
||||
t->flags |= TPVOL; /* end of file */
|
||||
else
|
||||
@ -801,7 +801,7 @@ wtdma (wtinfo_t *t)
|
||||
if (t->type == ARCHIVE)
|
||||
outb (t->SDMAPORT, 0); /* set dma */
|
||||
|
||||
if ((t->dmaflags & B_READ) && (t->dmatotal - t->dmacount) < t->bsize)
|
||||
if ((t->dmaflags & ISADMA_READ) && (t->dmatotal - t->dmacount) < t->bsize)
|
||||
/* Reading short block. Do it through the internal buffer. */
|
||||
isa_dmastart (t->dmaflags, t->buf, t->bsize, t->chan);
|
||||
else
|
||||
|
@ -54,6 +54,9 @@ typedef void isa_config_cb(void *arg, struct isa_config *config, int enable);
|
||||
#define ISA_NIRQ 2
|
||||
#define ISA_NDRQ 2
|
||||
|
||||
#define ISADMA_READ 0x00100000
|
||||
#define ISADMA_WRITE 0
|
||||
#define ISADMA_RAW 0x00080000
|
||||
/*
|
||||
* Plug and play cards can support a range of resource
|
||||
* configurations. This structure is used by the isapnp parser to
|
||||
|
@ -53,7 +53,6 @@
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/buf.h> /* B_READ and B_RAW */
|
||||
#include <sys/malloc.h>
|
||||
#ifdef PC98
|
||||
#include <machine/md_var.h>
|
||||
@ -277,7 +276,7 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
|
||||
newaddr = dma_bouncebuf[chan];
|
||||
|
||||
/* copy bounce buffer on write */
|
||||
if (!(flags & B_READ))
|
||||
if (!(flags & ISADMA_READ))
|
||||
bcopy(addr, newaddr, nbytes);
|
||||
addr = newaddr;
|
||||
}
|
||||
@ -285,7 +284,7 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
|
||||
/* translate to physical */
|
||||
phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
|
||||
|
||||
if (flags & B_RAW) {
|
||||
if (flags & ISADMA_RAW) {
|
||||
dma_auto_mode |= (1 << chan);
|
||||
} else {
|
||||
dma_auto_mode &= ~(1 << chan);
|
||||
@ -305,15 +304,15 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
|
||||
#endif
|
||||
/* set dma channel mode, and reset address ff */
|
||||
|
||||
/* If B_RAW flag is set, then use autoinitialise mode */
|
||||
if (flags & B_RAW) {
|
||||
if (flags & B_READ)
|
||||
/* If ISADMA_RAW flag is set, then use autoinitialise mode */
|
||||
if (flags & ISADMA_RAW) {
|
||||
if (flags & ISADMA_READ)
|
||||
outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
|
||||
else
|
||||
outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
|
||||
}
|
||||
else
|
||||
if (flags & B_READ)
|
||||
if (flags & ISADMA_READ)
|
||||
outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
|
||||
else
|
||||
outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
|
||||
@ -344,15 +343,15 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
|
||||
*/
|
||||
/* set dma channel mode, and reset address ff */
|
||||
|
||||
/* If B_RAW flag is set, then use autoinitialise mode */
|
||||
if (flags & B_RAW) {
|
||||
if (flags & B_READ)
|
||||
/* If ISADMA_RAW flag is set, then use autoinitialise mode */
|
||||
if (flags & ISADMA_RAW) {
|
||||
if (flags & ISADMA_READ)
|
||||
outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
|
||||
else
|
||||
outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
|
||||
}
|
||||
else
|
||||
if (flags & B_READ)
|
||||
if (flags & ISADMA_READ)
|
||||
outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
|
||||
else
|
||||
outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
|
||||
@ -379,7 +378,7 @@ void
|
||||
isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
|
||||
{
|
||||
#ifdef PC98
|
||||
if (flags & B_READ) {
|
||||
if (flags & ISADMA_READ) {
|
||||
/* cache flush only after reading 92/12/9 by A.Kojima */
|
||||
if (need_post_dma_flush)
|
||||
invd();
|
||||
@ -408,7 +407,7 @@ isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
|
||||
|
||||
if (dma_bounced & (1 << chan)) {
|
||||
/* copy bounce buffer on read */
|
||||
if (flags & B_READ)
|
||||
if (flags & ISADMA_READ)
|
||||
bcopy(dma_bouncebuf[chan], addr, nbytes);
|
||||
|
||||
dma_bounced &= ~(1 << chan);
|
||||
|
@ -53,7 +53,6 @@
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/buf.h> /* B_READ and B_RAW */
|
||||
#include <sys/malloc.h>
|
||||
#ifdef PC98
|
||||
#include <machine/md_var.h>
|
||||
@ -277,7 +276,7 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
|
||||
newaddr = dma_bouncebuf[chan];
|
||||
|
||||
/* copy bounce buffer on write */
|
||||
if (!(flags & B_READ))
|
||||
if (!(flags & ISADMA_READ))
|
||||
bcopy(addr, newaddr, nbytes);
|
||||
addr = newaddr;
|
||||
}
|
||||
@ -285,7 +284,7 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
|
||||
/* translate to physical */
|
||||
phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
|
||||
|
||||
if (flags & B_RAW) {
|
||||
if (flags & ISADMA_RAW) {
|
||||
dma_auto_mode |= (1 << chan);
|
||||
} else {
|
||||
dma_auto_mode &= ~(1 << chan);
|
||||
@ -305,15 +304,15 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
|
||||
#endif
|
||||
/* set dma channel mode, and reset address ff */
|
||||
|
||||
/* If B_RAW flag is set, then use autoinitialise mode */
|
||||
if (flags & B_RAW) {
|
||||
if (flags & B_READ)
|
||||
/* If ISADMA_RAW flag is set, then use autoinitialise mode */
|
||||
if (flags & ISADMA_RAW) {
|
||||
if (flags & ISADMA_READ)
|
||||
outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
|
||||
else
|
||||
outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
|
||||
}
|
||||
else
|
||||
if (flags & B_READ)
|
||||
if (flags & ISADMA_READ)
|
||||
outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
|
||||
else
|
||||
outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
|
||||
@ -344,15 +343,15 @@ isa_dmastart(int flags, caddr_t addr, u_int nbytes, int chan)
|
||||
*/
|
||||
/* set dma channel mode, and reset address ff */
|
||||
|
||||
/* If B_RAW flag is set, then use autoinitialise mode */
|
||||
if (flags & B_RAW) {
|
||||
if (flags & B_READ)
|
||||
/* If ISADMA_RAW flag is set, then use autoinitialise mode */
|
||||
if (flags & ISADMA_RAW) {
|
||||
if (flags & ISADMA_READ)
|
||||
outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
|
||||
else
|
||||
outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
|
||||
}
|
||||
else
|
||||
if (flags & B_READ)
|
||||
if (flags & ISADMA_READ)
|
||||
outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
|
||||
else
|
||||
outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
|
||||
@ -379,7 +378,7 @@ void
|
||||
isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
|
||||
{
|
||||
#ifdef PC98
|
||||
if (flags & B_READ) {
|
||||
if (flags & ISADMA_READ) {
|
||||
/* cache flush only after reading 92/12/9 by A.Kojima */
|
||||
if (need_post_dma_flush)
|
||||
invd();
|
||||
@ -408,7 +407,7 @@ isa_dmadone(int flags, caddr_t addr, int nbytes, int chan)
|
||||
|
||||
if (dma_bounced & (1 << chan)) {
|
||||
/* copy bounce buffer on read */
|
||||
if (flags & B_READ)
|
||||
if (flags & ISADMA_READ)
|
||||
bcopy(dma_bouncebuf[chan], addr, nbytes);
|
||||
|
||||
dma_bounced &= ~(1 << chan);
|
||||
|
Loading…
x
Reference in New Issue
Block a user