From db15dbf8801120241b7bfb6461341f2cb421ef8e Mon Sep 17 00:00:00 2001 From: Navdeep Parhar Date: Tue, 1 Jun 2021 12:14:17 -0700 Subject: [PATCH] cxgbe(4): Check if the firmware supports 512 SGL per FR MR. Firmwares >= 1.25.6.0 support 512 SGL entries in a single memory registration request. Obtained from: Chelsio Communications MFC after: 1 week Sponsored by: Chelsio Communications --- sys/dev/cxgbe/common/common.h | 1 + sys/dev/cxgbe/t4_main.c | 8 ++++++++ 2 files changed, 9 insertions(+) diff --git a/sys/dev/cxgbe/common/common.h b/sys/dev/cxgbe/common/common.h index 6264a7d6ec07..b803a7106a0c 100644 --- a/sys/dev/cxgbe/common/common.h +++ b/sys/dev/cxgbe/common/common.h @@ -405,6 +405,7 @@ struct adapter_params { bool ulptx_memwrite_dsgl; /* use of T5 DSGL allowed */ bool fr_nsmr_tpte_wr_support; /* FW support for FR_NSMR_TPTE_WR */ + bool dev_512sgl_mr; /* FW support for 512 SGL per FR MR */ bool viid_smt_extn_support; /* FW returns vin, vfvld & smt index? */ unsigned int max_pkts_per_eth_tx_pkts_wr; }; diff --git a/sys/dev/cxgbe/t4_main.c b/sys/dev/cxgbe/t4_main.c index 51fc6504e5c2..650300c805a1 100644 --- a/sys/dev/cxgbe/t4_main.c +++ b/sys/dev/cxgbe/t4_main.c @@ -5222,6 +5222,14 @@ get_params__post_init(struct adapter *sc) else sc->params.fr_nsmr_tpte_wr_support = false; + /* Support for 512 SGL entries per FR MR. */ + param[0] = FW_PARAM_DEV(DEV_512SGL_MR); + rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); + if (rc == 0) + sc->params.dev_512sgl_mr = val[0] != 0; + else + sc->params.dev_512sgl_mr = false; + param[0] = FW_PARAM_PFVF(MAX_PKTS_PER_ETH_TX_PKTS_WR); rc = -t4_query_params(sc, sc->mbox, sc->pf, 0, 1, param, val); if (rc == 0)