- For chipsets that can't do 64k transfers, fall back to 32k transfers

(still a power of 2) rather than 63k transfers.  Even with 63k transfers
  some machines (such as Dell SC1435's) were experiencing chronic data
  corruption.
- Use the MIO method to talk to the Serverworks HT1000_S1 SATA controller
  like all the other SATA controllers rather than the compat PATA
  method.  This lets the controller see all 4 SATA ports and also
  matches the behavior of the Linux driver.

Silence from:	sos
MFC after:	3 days
This commit is contained in:
John Baldwin 2008-10-17 16:03:37 +00:00
parent 7fb179ba7e
commit dd8c8a8e43
4 changed files with 5 additions and 5 deletions

View File

@ -109,7 +109,7 @@ ata_cyrix_setmode(device_t dev, int mode)
/* dont try to set the mode if we dont have the resource */
if (ctlr->r_res1) {
ch->dma.alignment = 16;
ch->dma.max_iosize = 126 * DEV_BSIZE;
ch->dma.max_iosize = 64 * DEV_BSIZE;
if (mode >= ATA_UDMA0) {
ATA_OUTL(ch->r_io[ATA_BMCMD_PORT].res,

View File

@ -536,7 +536,7 @@ ata_marvell_edma_dmainit(device_t dev)
ch->dma.max_address = BUS_SPACE_MAXADDR;
/* chip does not reliably do 64K DMA transfers */
ch->dma.max_iosize = 126 * DEV_BSIZE;
ch->dma.max_iosize = 64 * DEV_BSIZE;
}
ATA_DECLARE_DRIVER(ata_marvell);

View File

@ -101,7 +101,7 @@ ata_national_setmode(device_t dev, int mode)
int error;
ch->dma.alignment = 16;
ch->dma.max_iosize = 126 * DEV_BSIZE;
ch->dma.max_iosize = 64 * DEV_BSIZE;
mode = ata_limit_mode(dev, mode, ATA_UDMA2);

View File

@ -79,7 +79,7 @@ ata_serverworks_probe(device_t dev)
{ ATA_CSB6, 0x00, SWKS_100, 0, ATA_UDMA5, "CSB6" },
{ ATA_CSB6_1, 0x00, SWKS_66, 0, ATA_UDMA4, "CSB6" },
{ ATA_HT1000, 0x00, SWKS_100, 0, ATA_UDMA5, "HT1000" },
{ ATA_HT1000_S1, 0x00, SWKS_100, 4, ATA_SA150, "HT1000" },
{ ATA_HT1000_S1, 0x00, SWKS_MIO, 4, ATA_SA150, "HT1000" },
{ ATA_HT1000_S2, 0x00, SWKS_MIO, 4, ATA_SA150, "HT1000" },
{ ATA_K2, 0x00, SWKS_MIO, 4, ATA_SA150, "K2" },
{ ATA_FRODO4, 0x00, SWKS_MIO, 4, ATA_SA150, "Frodo4" },
@ -184,7 +184,7 @@ ata_serverworks_allocate(device_t dev)
ch->hw.tf_write = ata_serverworks_tf_write;
/* chip does not reliably do 64K DMA transfers */
ch->dma.max_iosize = 126 * DEV_BSIZE;
ch->dma.max_iosize = 64 * DEV_BSIZE;
return 0;
}