From dddab08921d793dcc6a37f3699491a401812fc88 Mon Sep 17 00:00:00 2001 From: Luiz Otavio O Souza Date: Tue, 1 Jul 2014 14:33:48 +0000 Subject: [PATCH] Add the CPU port flag to the CPU port on rtl8366 (port 5). Do not allow any media change on the switch CPU port. Tested on TP-Link WR1043ND. --- sys/dev/etherswitch/rtl8366/rtl8366rb.c | 3 +++ sys/dev/etherswitch/rtl8366/rtl8366rbvar.h | 9 +++++---- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/sys/dev/etherswitch/rtl8366/rtl8366rb.c b/sys/dev/etherswitch/rtl8366/rtl8366rb.c index eedd3474b353..6fd343393b90 100644 --- a/sys/dev/etherswitch/rtl8366/rtl8366rb.c +++ b/sys/dev/etherswitch/rtl8366/rtl8366rb.c @@ -570,6 +570,7 @@ rtl_getport(device_t dev, etherswitch_port_t *p) return (err); } else { /* fill in fixed values for CPU port */ + p->es_flags |= ETHERSWITCH_PORT_CPU; ifmr->ifm_count = 0; smi_read(dev, RTL8366RB_PLSR_BASE + (RTL8366RB_NUM_PHYS)/2, &v, RTL_WAITOK); v = v >> (8 * ((RTL8366RB_NUM_PHYS) % 2)); @@ -606,6 +607,8 @@ rtl_setport(device_t dev, etherswitch_port_t *p) RTL8366RB_PVCR_VAL(p->es_port, vlangroup), RTL_WAITOK); if (err) return (err); + if (p->es_port == RTL8366RB_CPU_PORT) + return (0); mii = device_get_softc(sc->miibus[p->es_port]); ifm = &mii->mii_media; err = ifmedia_ioctl(sc->ifp[p->es_port], &p->es_ifr, ifm, SIOCSIFMEDIA); diff --git a/sys/dev/etherswitch/rtl8366/rtl8366rbvar.h b/sys/dev/etherswitch/rtl8366/rtl8366rbvar.h index 4f3d1bae044b..b582171e2a68 100644 --- a/sys/dev/etherswitch/rtl8366/rtl8366rbvar.h +++ b/sys/dev/etherswitch/rtl8366/rtl8366rbvar.h @@ -168,9 +168,10 @@ (RTL8366RB_PACR | (1 << (((phy) & 0x1f) + 9)) | (((page) & 0xf) << 5) | ((reg) & 0x1f)) /* general characteristics of the chip */ -#define RTL8366RB_NUM_PORTS 6 -#define RTL8366RB_NUM_PHYS (RTL8366RB_NUM_PORTS-1) -#define RTL8366RB_NUM_VLANS 16 -#define RTL8366RB_NUM_PHY_REG 32 +#define RTL8366RB_CPU_PORT 5 +#define RTL8366RB_NUM_PORTS 6 +#define RTL8366RB_NUM_PHYS (RTL8366RB_NUM_PORTS-1) +#define RTL8366RB_NUM_VLANS 16 +#define RTL8366RB_NUM_PHY_REG 32 #endif