Whitespace cleanups, no functional change.
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9892cc9ad4
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@ -56,8 +56,8 @@ __FBSDID("$FreeBSD$");
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#include "pci_irq.h"
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#include "pci_irq.h"
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#include "pci_lpc.h"
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#include "pci_lpc.h"
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#define CONF1_ADDR_PORT 0x0cf8
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#define CONF1_ADDR_PORT 0x0cf8
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#define CONF1_DATA_PORT 0x0cfc
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#define CONF1_DATA_PORT 0x0cfc
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#define CONF1_ENABLE 0x80000000ul
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#define CONF1_ENABLE 0x80000000ul
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@ -479,7 +479,7 @@ modify_bar_registration(struct pci_devinst *pi, int idx, int registration)
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iop.handler = pci_emul_io_handler;
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iop.handler = pci_emul_io_handler;
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iop.arg = pi;
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iop.arg = pi;
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error = register_inout(&iop);
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error = register_inout(&iop);
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} else
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} else
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error = unregister_inout(&iop);
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error = unregister_inout(&iop);
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break;
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break;
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case PCIBAR_MEM32:
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case PCIBAR_MEM32:
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@ -547,7 +547,7 @@ memen(struct pci_devinst *pi)
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* the address range decoded by the BAR register.
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* the address range decoded by the BAR register.
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*/
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*/
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static void
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static void
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update_bar_address(struct pci_devinst *pi, uint64_t addr, int idx, int type)
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update_bar_address(struct pci_devinst *pi, uint64_t addr, int idx, int type)
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{
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{
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int decode;
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int decode;
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@ -670,7 +670,7 @@ pci_emul_alloc_pbar(struct pci_devinst *pdi, int idx, uint64_t hostbase,
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pdi->pi_bar[idx + 1].type = PCIBAR_MEMHI64;
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pdi->pi_bar[idx + 1].type = PCIBAR_MEMHI64;
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pci_set_cfgdata32(pdi, PCIR_BAR(idx + 1), bar >> 32);
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pci_set_cfgdata32(pdi, PCIR_BAR(idx + 1), bar >> 32);
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}
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}
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register_bar(pdi, idx);
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register_bar(pdi, idx);
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return (0);
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return (0);
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@ -843,7 +843,7 @@ pci_emul_add_msixcap(struct pci_devinst *pi, int msgnum, int barnum)
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assert(msgnum >= 1 && msgnum <= MAX_MSIX_TABLE_ENTRIES);
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assert(msgnum >= 1 && msgnum <= MAX_MSIX_TABLE_ENTRIES);
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assert(barnum >= 0 && barnum <= PCIR_MAX_BAR_0);
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assert(barnum >= 0 && barnum <= PCIR_MAX_BAR_0);
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tab_size = msgnum * MSIX_TABLE_ENTRY_SIZE;
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tab_size = msgnum * MSIX_TABLE_ENTRY_SIZE;
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/* Align table size to nearest 4K */
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/* Align table size to nearest 4K */
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@ -1093,7 +1093,7 @@ init_pci(struct vmctx *ctx)
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for (bus = 0; bus < MAXBUSES; bus++) {
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for (bus = 0; bus < MAXBUSES; bus++) {
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if ((bi = pci_businfo[bus]) == NULL)
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if ((bi = pci_businfo[bus]) == NULL)
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continue;
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continue;
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/*
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/*
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* Keep track of the i/o and memory resources allocated to
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* Keep track of the i/o and memory resources allocated to
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* this bus.
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* this bus.
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*/
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*/
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@ -1726,9 +1726,9 @@ pci_emul_cmdsts_write(struct pci_devinst *pi, int coff, uint32_t new, int bytes)
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else
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else
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unregister_bar(pi, i);
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unregister_bar(pi, i);
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}
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}
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break;
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break;
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default:
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default:
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assert(0);
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assert(0);
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}
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}
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}
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}
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@ -1944,7 +1944,7 @@ INOUT_PORT(pci_cfgdata, CONF1_DATA_PORT+3, IOPORT_F_INOUT, pci_emul_cfgdata);
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#define DIOSZ 8
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#define DIOSZ 8
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#define DMEMSZ 4096
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#define DMEMSZ 4096
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struct pci_emul_dsoftc {
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struct pci_emul_dsoftc {
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uint8_t ioregs[DIOSZ];
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uint8_t ioregs[DIOSZ];
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uint8_t memregs[2][DMEMSZ];
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uint8_t memregs[2][DMEMSZ];
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};
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};
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@ -2036,7 +2036,7 @@ pci_emul_diow(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, int baridx,
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} else {
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} else {
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printf("diow: memw unknown size %d\n", size);
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printf("diow: memw unknown size %d\n", size);
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}
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}
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/*
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/*
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* magic interrupt ??
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* magic interrupt ??
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*/
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*/
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@ -2061,7 +2061,7 @@ pci_emul_dior(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, int baridx,
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offset, size);
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offset, size);
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return (0);
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return (0);
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}
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}
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value = 0;
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value = 0;
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if (size == 1) {
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if (size == 1) {
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value = sc->ioregs[offset];
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value = sc->ioregs[offset];
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@ -2080,7 +2080,7 @@ pci_emul_dior(struct vmctx *ctx, int vcpu, struct pci_devinst *pi, int baridx,
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offset, size);
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offset, size);
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return (0);
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return (0);
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}
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}
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i = baridx - 1; /* 'memregs' index */
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i = baridx - 1; /* 'memregs' index */
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if (size == 1) {
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if (size == 1) {
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