Add support for the 'invpcid' instruction to binutils and DDB's
disassembler on amd64. MFC after: 1 month
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@ -3990,7 +3990,8 @@ output_insn (void)
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goto check_prefix;
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}
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}
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else if (i.tm.base_opcode == 0x660f3880 || i.tm.base_opcode == 0x660f3881)
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else if (i.tm.base_opcode == 0x660f3880 || i.tm.base_opcode == 0x660f3881
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|| i.tm.base_opcode == 0x660f3882)
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{
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/* invept and invvpid are 3 byte instructions with a
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mandatory prefix. */
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@ -4040,7 +4041,8 @@ output_insn (void)
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*p++ = (i.tm.base_opcode >> 16) & 0xff;
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}
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else if (i.tm.base_opcode == 0x660f3880 ||
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i.tm.base_opcode == 0x660f3881)
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i.tm.base_opcode == 0x660f3881 ||
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i.tm.base_opcode == 0x660f3882)
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{
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p = frag_more (3);
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*p++ = (i.tm.base_opcode >> 16) & 0xff;
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@ -550,6 +550,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
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#define PREGRP104 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 104 } }
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#define PREGRP105 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 105 } }
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#define PREGRP106 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 106 } }
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#define PREGRP107 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 107 } }
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#define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
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@ -2668,6 +2669,14 @@ static const struct dis386 prefix_user_table[][4] = {
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{ "pclmulqdq", { XM, EXx, Ib } },
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{ "(bad)", { XX } },
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},
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/* PREGRP107 */
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{
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ "invpcid",{ Gm, Mo } },
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{ "(bad)", { XX } },
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},
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};
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static const struct dis386 x86_64_table[][2] = {
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@ -2839,7 +2848,7 @@ static const struct dis386 three_byte_table[][256] = {
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/* 80 */
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{ PREGRP98 },
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{ PREGRP99 },
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{ "(bad)", { XX } },
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{ PREGRP107 },
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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{ "(bad)", { XX } },
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@ -1498,3 +1498,7 @@ xsetbv, 0, 0xf01, 0xd1, CpuXSAVE, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSu
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xsave, 1, 0xfae, 0x4, CpuXSAVE, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S }
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xsaveopt, 1, 0xfae, 0x6, CpuXSAVE, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S }
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xrstor, 1, 0xfae, 0x5, CpuXSAVE, Modrm|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S }
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// INVPCID
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invpcid, 2, 0x660f3882, None, CpuNo64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32 }
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invpcid, 2, 0x660f3882, None, Cpu64, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg64 }
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@ -3641,6 +3641,14 @@ const template i386_optab[] =
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Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64,
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{ BaseIndex|Disp8|Disp16|Disp32|Disp32S,
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Reg64 } },
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{ "invpcid", 2, 0x660f3882, None, CpuNo64,
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Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64,
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{ BaseIndex|Disp8|Disp16|Disp32|Disp32S,
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Reg32 } },
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{ "invpcid", 2, 0x660f3882, None, Cpu64,
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Modrm|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64,
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{ BaseIndex|Disp8|Disp16|Disp32|Disp32S,
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Reg64 } },
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{ "vmcall", 0, 0xf01, 0xc1, CpuVMX,
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No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt,
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{ 0 } },
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@ -127,7 +127,7 @@ struct finst {
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static const struct inst db_inst_0f388x[] = {
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/*80*/ { "", TRUE, SDEP, op2(E, Rq), "invept" },
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/*81*/ { "", TRUE, SDEP, op2(E, Rq), "invvpid" },
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/*82*/ { "", FALSE, NONE, 0, 0 },
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/*82*/ { "", TRUE, SDEP, op2(E, Rq), "invpcid" },
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/*83*/ { "", FALSE, NONE, 0, 0 },
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/*84*/ { "", FALSE, NONE, 0, 0 },
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/*85*/ { "", FALSE, NONE, 0, 0 },
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