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Create macros for the ACPI interrupt cross references. This is considered a

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band aid until a better solution to find the correct interrupt controller
can be found.

While here fix one place in the GICv3 ITS driver where the offset wasn't
correctly applied.

Sponsored by:	DARPA, AFRL
Sponsored by:	Cavium (Hardware)
This commit is contained in:
Andrew Turner 2018-03-07 13:16:03 +00:00
parent d0a82c2414
commit e0fe10600a
5 changed files with 21 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
sys/arm64/arm64/gic_v3_acpi.c
View File

@ -27,6 +27,8 @@
* SUCH DAMAGE.
*/
#include "opt_acpi.h"
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
@ -260,14 +262,14 @@ gic_v3_acpi_attach(device_t dev)
if (err != 0)
goto error;
sc->gic_pic = intr_pic_register(dev, 0);
sc->gic_pic = intr_pic_register(dev, ACPI_INTR_XREF);
if (sc->gic_pic == NULL) {
device_printf(dev, "could not register PIC\n");
err = ENXIO;
goto error;
}
if (intr_pic_claim_root(dev, 0, arm_gic_v3_intr, sc,
if (intr_pic_claim_root(dev, ACPI_INTR_XREF, arm_gic_v3_intr, sc,
GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) {
err = ENXIO;
goto error;

5
sys/arm64/arm64/gicv3_its.c
View File

@ -1734,12 +1734,13 @@ gicv3_its_acpi_attach(device_t dev)
if (err != 0)
return (err);
sc->sc_pic = intr_pic_register(dev, device_get_unit(dev) + 1);
sc->sc_pic = intr_pic_register(dev,
device_get_unit(dev) + ACPI_MSI_XREF);
intr_pic_add_handler(device_get_parent(dev), sc->sc_pic,
gicv3_its_intr, sc, GIC_FIRST_LPI, LPI_NIRQS);
/* Register this device to handle MSI interrupts */
intr_msi_register(dev, 1);
intr_msi_register(dev, device_get_unit(dev) + ACPI_MSI_XREF);
return (0);
}

4
sys/arm64/arm64/nexus.c
View File

@ -73,6 +73,7 @@ __FBSDID("$FreeBSD$");
#include <contrib/dev/acpica/include/acpi.h>
#include <dev/acpica/acpivar.h>
#include "acpi_bus_if.h"
#include "pcib_if.h"
#endif
extern struct bus_space memmap_bus;
@ -524,7 +525,8 @@ nexus_acpi_map_intr(device_t dev, device_t child, u_int irq, int trig, int pol)
* controllers for the largest base value that is no larger than
* the IRQ value.
*/
irq = intr_map_irq(NULL, 0, (struct intr_map_data *)acpi_data);
irq = intr_map_irq(NULL, ACPI_INTR_XREF,
(struct intr_map_data *)acpi_data);
return (irq);
}
#endif

5
sys/arm64/include/intr.h
View File

@ -48,4 +48,9 @@ arm_irq_memory_barrier(uintptr_t irq)
void intr_ipi_dispatch(u_int, struct trapframe *);
#endif
#ifdef DEV_ACPI
#define ACPI_INTR_XREF 1
#define ACPI_MSI_XREF 2
#endif
#endif /* _MACHINE_INTR_H */

11
sys/dev/pci/pci_host_generic_acpi.c
View File

@ -228,7 +228,8 @@ generic_pcie_acpi_alloc_msi(device_t pci, device_t child, int count,
{
#if defined(INTRNG)
return (intr_alloc_msi(pci, child, 1, count, maxcount, irqs));
return (intr_alloc_msi(pci, child, ACPI_MSI_XREF, count, maxcount,
irqs));
#else
return (ENXIO);
#endif
@ -240,7 +241,7 @@ generic_pcie_acpi_release_msi(device_t pci, device_t child, int count,
{
#if defined(INTRNG)
return (intr_release_msi(pci, child, 1, count, irqs));
return (intr_release_msi(pci, child, ACPI_MSI_XREF, count, irqs));
#else
return (ENXIO);
#endif
@ -252,7 +253,7 @@ generic_pcie_acpi_map_msi(device_t pci, device_t child, int irq, uint64_t *addr,
{
#if defined(INTRNG)
return (intr_map_msi(pci, child, 1, irq, addr, data));
return (intr_map_msi(pci, child, ACPI_MSI_XREF, irq, addr, data));
#else
return (ENXIO);
#endif
@ -263,7 +264,7 @@ generic_pcie_acpi_alloc_msix(device_t pci, device_t child, int *irq)
{
#if defined(INTRNG)
return (intr_alloc_msix(pci, child, 1, irq));
return (intr_alloc_msix(pci, child, ACPI_MSI_XREF, irq));
#else
return (ENXIO);
#endif
@ -274,7 +275,7 @@ generic_pcie_acpi_release_msix(device_t pci, device_t child, int irq)
{
#if defined(INTRNG)
return (intr_release_msix(pci, child, 1, irq));
return (intr_release_msix(pci, child, ACPI_MSI_XREF, irq));
#else
return (ENXIO);
#endif