Restore style(9) conformance after r320844 (actually requested pre-
commit) and bring the r320844 additions in line with existing bits.
This commit is contained in:
Marius Strobl
parent
0ebe2634be
commit
e388d638b1
@ -159,34 +159,35 @@ struct mmc_command {
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#define R1_STATE_PRG 7
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#define R1_STATE_DIS 8
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/* R4 response (SDIO) */
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#define R4_IO_NUM_FUNCTIONS(ocr) (((ocr) >> 28) & 0x3)
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#define R4_IO_MEM_PRESENT (0x1<<27)
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#define R4_IO_OCR_MASK 0x00fffff0
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/* R4 responses (SDIO) */
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#define R4_IO_NUM_FUNCTIONS(ocr) (((ocr) >> 28) & 0x3)
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#define R4_IO_MEM_PRESENT (0x1 << 27)
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#define R4_IO_OCR_MASK 0x00fffff0
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/*
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* R5 responses
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*
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* Types (per SD 2.0 standard)
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*e : error bit
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*s : status bit
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*r : detected and set for the actual command response
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*x : Detected and set during command execution. The host can get
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* the status by issuing a command with R1 response.
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* e : error bit
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* s : status bit
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* r : detected and set for the actual command response
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* x : Detected and set during command execution. The host can get
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* the status by issuing a command with R1 response.
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*
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* Clear Condition (per SD 2.0 standard)
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*a : according to the card current state.
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*b : always related to the previous command. reception of a valid
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* command will clear it (with a delay of one command).
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*c : clear by read
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* a : according to the card current state.
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* b : always related to the previous command. reception of a valid
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* command will clear it (with a delay of one command).
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* c : clear by read
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*/
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#define R5_COM_CRC_ERROR (1u << 15)/* er, b */
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#define R5_ILLEGAL_COMMAND (1u << 14)/* er, b */
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#define R5_IO_CURRENT_STATE_MASK (3u << 12)/* s, b */
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#define R5_IO_CURRENT_STATE(x) (((x) & R5_IO_CURRENT_STATE_MASK) >> 12)
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#define R5_ERROR (1u << 11)/* erx, c */
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#define R5_FUNCTION_NUMBER (1u << 9)/* er, c */
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#define R5_OUT_OF_RANGE (1u << 8)/* er, c */
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#define R5_COM_CRC_ERROR (1u << 15) /* er, b */
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#define R5_ILLEGAL_COMMAND (1u << 14) /* er, b */
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#define R5_IO_CURRENT_STATE_MASK (3u << 12) /* s, b */
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#define R5_IO_CURRENT_STATE(x) (((x) & R5_IO_CURRENT_STATE_MASK) >> 12)
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#define R5_ERROR (1u << 11) /* erx, c */
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#define R5_FUNCTION_NUMBER (1u << 9) /* er, c */
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#define R5_OUT_OF_RANGE (1u << 8) /* er, c */
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struct mmc_data {
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size_t len; /* size of the data */
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size_t xfer_len;
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@ -219,7 +220,7 @@ struct mmc_request {
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#define SD_SEND_RELATIVE_ADDR 3
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#define MMC_SET_DSR 4
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#define MMC_SLEEP_AWAKE 5
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#define IO_SEND_OP_COND 5
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#define IO_SEND_OP_COND 5
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#define MMC_SWITCH_FUNC 6
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#define MMC_SWITCH_FUNC_CMDS 0
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#define MMC_SWITCH_FUNC_SET 1
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@ -310,30 +311,30 @@ struct mmc_request {
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/* Class 9: I/O cards (sd) */
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#define SD_IO_RW_DIRECT 52
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/* CMD52 arguments */
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#define SD_ARG_CMD52_READ (0<<31)
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#define SD_ARG_CMD52_WRITE (1<<31)
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#define SD_ARG_CMD52_FUNC_SHIFT 28
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#define SD_ARG_CMD52_FUNC_MASK 0x7
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#define SD_ARG_CMD52_EXCHANGE (1<<27)
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#define SD_ARG_CMD52_REG_SHIFT 9
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#define SD_ARG_CMD52_REG_MASK 0x1ffff
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#define SD_ARG_CMD52_DATA_SHIFT 0
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#define SD_ARG_CMD52_DATA_MASK 0xff
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#define SD_R5_DATA(resp) ((resp)[0] & 0xff)
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#define SD_ARG_CMD52_READ (0 << 31)
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#define SD_ARG_CMD52_WRITE (1 << 31)
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#define SD_ARG_CMD52_FUNC_SHIFT 28
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#define SD_ARG_CMD52_FUNC_MASK 0x7
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#define SD_ARG_CMD52_EXCHANGE (1 << 27)
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#define SD_ARG_CMD52_REG_SHIFT 9
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#define SD_ARG_CMD52_REG_MASK 0x1ffff
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#define SD_ARG_CMD52_DATA_SHIFT 0
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#define SD_ARG_CMD52_DATA_MASK 0xff
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#define SD_R5_DATA(resp) ((resp)[0] & 0xff)
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#define SD_IO_RW_EXTENDED 53
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/* CMD53 arguments */
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#define SD_ARG_CMD53_READ (0<<31)
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#define SD_ARG_CMD53_WRITE (1<<31)
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#define SD_ARG_CMD53_FUNC_SHIFT 28
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#define SD_ARG_CMD53_FUNC_MASK 0x7
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#define SD_ARG_CMD53_BLOCK_MODE (1<<27)
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#define SD_ARG_CMD53_INCREMENT (1<<26)
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#define SD_ARG_CMD53_REG_SHIFT 9
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#define SD_ARG_CMD53_REG_MASK 0x1ffff
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#define SD_ARG_CMD53_LENGTH_SHIFT 0
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#define SD_ARG_CMD53_LENGTH_MASK 0x1ff
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#define SD_ARG_CMD53_LENGTH_MAX 64 /* XXX should be 511? */
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#define SD_ARG_CMD53_READ (0 << 31)
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#define SD_ARG_CMD53_WRITE (1 << 31)
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#define SD_ARG_CMD53_FUNC_SHIFT 28
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#define SD_ARG_CMD53_FUNC_MASK 0x7
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#define SD_ARG_CMD53_BLOCK_MODE (1 << 27)
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#define SD_ARG_CMD53_INCREMENT (1 << 26)
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#define SD_ARG_CMD53_REG_SHIFT 9
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#define SD_ARG_CMD53_REG_MASK 0x1ffff
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#define SD_ARG_CMD53_LENGTH_SHIFT 0
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#define SD_ARG_CMD53_LENGTH_MASK 0x1ff
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#define SD_ARG_CMD53_LENGTH_MAX 64 /* XXX should be 511? */
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/* Class 10: Switch function commands */
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#define SD_SWITCH_FUNC 6
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@ -525,50 +526,50 @@ struct mmc_request {
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/*
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* SDIO Direct & Extended I/O
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*/
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#define SD_IO_RW_WR (1u << 31)
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#define SD_IO_RW_FUNC(x) (((x) & 0x7) << 28)
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#define SD_IO_RW_RAW (1u << 27)
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#define SD_IO_RW_INCR (1u << 26)
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#define SD_IO_RW_ADR(x) (((x) & 0x1FFFF) << 9)
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#define SD_IO_RW_DAT(x) (((x) & 0xFF) << 0)
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#define SD_IO_RW_LEN(x) (((x) & 0xFF) << 0)
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#define SD_IO_RW_WR (1u << 31)
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#define SD_IO_RW_FUNC(x) (((x) & 0x7) << 28)
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#define SD_IO_RW_RAW (1u << 27)
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#define SD_IO_RW_INCR (1u << 26)
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#define SD_IO_RW_ADR(x) (((x) & 0x1FFFF) << 9)
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#define SD_IO_RW_DAT(x) (((x) & 0xFF) << 0)
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#define SD_IO_RW_LEN(x) (((x) & 0xFF) << 0)
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#define SD_IOE_RW_LEN(x) (((x) & 0x1FF) << 0)
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#define SD_IOE_RW_BLK (1u << 27)
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#define SD_IOE_RW_LEN(x) (((x) & 0x1FF) << 0)
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#define SD_IOE_RW_BLK (1u << 27)
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/* Card Common Control Registers (CCCR) */
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#define SD_IO_CCCR_START 0x00000
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#define SD_IO_CCCR_SIZE 0x100
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#define SD_IO_CCCR_FN_ENABLE 0x02
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#define SD_IO_CCCR_FN_READY 0x03
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#define SD_IO_CCCR_INT_ENABLE 0x04
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#define SD_IO_CCCR_INT_PENDING 0x05
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#define SD_IO_CCCR_CTL 0x06
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#define CCCR_CTL_RES (1<<3)
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#define SD_IO_CCCR_BUS_WIDTH 0x07
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#define CCCR_BUS_WIDTH_4 (1<<1)
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#define CCCR_BUS_WIDTH_1 (1<<0)
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#define SD_IO_CCCR_CARDCAP 0x08
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#define SD_IO_CCCR_CISPTR 0x09 /* XXX 9-10, 10-11, or 9-12 */
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#define SD_IO_CCCR_START 0x00000
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#define SD_IO_CCCR_SIZE 0x100
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#define SD_IO_CCCR_FN_ENABLE 0x02
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#define SD_IO_CCCR_FN_READY 0x03
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#define SD_IO_CCCR_INT_ENABLE 0x04
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#define SD_IO_CCCR_INT_PENDING 0x05
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#define SD_IO_CCCR_CTL 0x06
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#define CCCR_CTL_RES (1 << 3)
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#define SD_IO_CCCR_BUS_WIDTH 0x07
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#define CCCR_BUS_WIDTH_4 (1 << 1)
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#define CCCR_BUS_WIDTH_1 (1 << 0)
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#define SD_IO_CCCR_CARDCAP 0x08
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#define SD_IO_CCCR_CISPTR 0x09 /* XXX 9-10, 10-11, or 9-12 */
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/* Function Basic Registers (FBR) */
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#define SD_IO_FBR_START 0x00100
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#define SD_IO_FBR_SIZE 0x00700
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#define SD_IO_FBR_START 0x00100
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#define SD_IO_FBR_SIZE 0x00700
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/* Card Information Structure (CIS) */
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#define SD_IO_CIS_START 0x01000
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#define SD_IO_CIS_SIZE 0x17000
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#define SD_IO_CIS_START 0x01000
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#define SD_IO_CIS_SIZE 0x17000
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/* CIS tuple codes (based on PC Card 16) */
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#define SD_IO_CISTPL_VERS_1 0x15
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#define SD_IO_CISTPL_MANFID 0x20
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#define SD_IO_CISTPL_FUNCID 0x21
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#define SD_IO_CISTPL_FUNCE 0x22
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#define SD_IO_CISTPL_END 0xff
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#define SD_IO_CISTPL_VERS_1 0x15
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#define SD_IO_CISTPL_MANFID 0x20
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#define SD_IO_CISTPL_FUNCID 0x21
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#define SD_IO_CISTPL_FUNCE 0x22
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#define SD_IO_CISTPL_END 0xff
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/* CISTPL_FUNCID codes */
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/* OpenBSD incorrectly defines 0x0c as FUNCTION_WLAN */
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/* #define SDMMC_FUNCTION_WLAN 0x0c */
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/* #define SDMMC_FUNCTION_WLAN 0x0c */
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/* OCR bits */
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