diff --git a/sys/i386/i386/identcpu.c b/sys/i386/i386/identcpu.c
index 2f0be0964b2f..7fb488d8e9b7 100644
--- a/sys/i386/i386/identcpu.c
+++ b/sys/i386/i386/identcpu.c
@@ -584,16 +584,28 @@ printcpuinfo(void)
 			break;
 		case 0x690:
 			strcpy(cpu_model, "VIA C3 Nehemiah");
+			if ((cpu_id & 0xf) < 3)
+				break;
+			/* fall through. */
+		case 0x6a9:
+			strcpy(cpu_model, "VIA C7 Esther");
 			do_cpuid(0xc0000000, regs);
-			if (regs[0] == 0xc0000001) {
+			i = regs[0];
+			if (i >= 0xC0000001) {
 				do_cpuid(0xc0000001, regs);
-				if ((cpu_id & 0xf) >= 3)
-					if ((regs[3] & 0x0c) == 0x0c)
-						strcat(cpu_model, "+RNG");
-				if ((cpu_id & 0xf) >= 8)
-					if ((regs[3] & 0xc0) == 0xc0)
-						strcat(cpu_model, "+ACE");
-			}
+				i = regs[3];
+			} else
+				i = 0;
+			if (i & VIA_CPUID_HAS_RNG)
+				strcat(cpu_model, "+RNG");
+			if (i & VIA_CPUID_HAS_ACE)
+				strcat(cpu_model, "+AES");
+			if (i & VIA_CPUID_HAS_ACE2)
+				strcat(cpu_model, "+AES-CTR");
+			if (i & VIA_CPUID_HAS_PHE)
+				strcat(cpu_model, "+SHA1+SHA256");
+			if (i & VIA_CPUID_HAS_PMM)
+				strcat(cpu_model, "+RSA");
 			break;
 		default:
 			strcpy(cpu_model, "VIA/IDT Unknown");
diff --git a/sys/i386/include/specialreg.h b/sys/i386/include/specialreg.h
index 8c8cd0dbdc94..e1b9620b717a 100644
--- a/sys/i386/include/specialreg.h
+++ b/sys/i386/include/specialreg.h
@@ -409,6 +409,38 @@
 #define	AMD_WT_ALLOC_PRE	0x20000	/* programmable range enable */
 #define	AMD_WT_ALLOC_FRE	0x10000	/* fixed (A0000-FFFFF) range enable */
 
+/* VIA ACE crypto featureset: for via_has_xcrypt */
+#define VIA_HAS_AES		1	/* cpu has AES */
+#define VIA_HAS_SHA		2	/* cpu has SHA1 & SHA256 */
+#define VIA_HAS_MM		4	/* cpu has RSA instructions */
+#define VIA_HAS_AESCTR		8	/* cpu has AES-CTR instructions */
+
+/* Centaur Extended Feature flags */
+#define VIA_CPUID_HAS_RNG	0x000004
+#define VIA_CPUID_DO_RNG	0x000008
+#define VIA_CPUID_HAS_ACE	0x000040
+#define VIA_CPUID_DO_ACE	0x000080
+#define VIA_CPUID_HAS_ACE2	0x000100
+#define VIA_CPUID_DO_ACE2	0x000200
+#define VIA_CPUID_HAS_PHE	0x000400
+#define VIA_CPUID_DO_PHE	0x000800
+#define VIA_CPUID_HAS_PMM	0x001000
+#define VIA_CPUID_DO_PMM	0x002000
+
+/* VIA ACE xcrypt-* instruction context control options */
+#define VIA_CRYPT_CWLO_ROUND_M		0x0000000f
+#define VIA_CRYPT_CWLO_ALG_M		0x00000070
+#define VIA_CRYPT_CWLO_ALG_AES		0x00000000
+#define VIA_CRYPT_CWLO_KEYGEN_M		0x00000080
+#define VIA_CRYPT_CWLO_KEYGEN_HW	0x00000000
+#define VIA_CRYPT_CWLO_KEYGEN_SW	0x00000080
+#define VIA_CRYPT_CWLO_NORMAL		0x00000000
+#define VIA_CRYPT_CWLO_INTERMEDIATE	0x00000100
+#define VIA_CRYPT_CWLO_ENCRYPT		0x00000000
+#define VIA_CRYPT_CWLO_DECRYPT		0x00000200
+#define VIA_CRYPT_CWLO_KEY128		0x0000000a	/* 128bit, 10 rds */
+#define VIA_CRYPT_CWLO_KEY192		0x0000040c	/* 192bit, 12 rds */
+#define VIA_CRYPT_CWLO_KEY256		0x0000080e	/* 256bit, 15 rds */
 
 #ifndef LOCORE
 static __inline u_char