- Add EHCI controller driver for AR71XX-based boards.
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291
sys/mips/atheros/ar71xx_ehci.c
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291
sys/mips/atheros/ar71xx_ehci.c
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/*-
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* Copyright (c) 2008 Sam Leffler. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* AR71XX attachment driver for the USB Enhanced Host Controller.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_bus.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <dev/usb/usb_mfunc.h>
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#include <dev/usb/usb.h>
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#include <dev/usb/usb_core.h>
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#include <dev/usb/usb_busdma.h>
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#include <dev/usb/usb_process.h>
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#include <dev/usb/usb_util.h>
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#include <dev/usb/usb_controller.h>
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#include <dev/usb/usb_bus.h>
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#include <dev/usb/controller/ehci.h>
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#include <mips/atheros/ar71xx_bus_space_reversed.h>
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#define EHCI_HC_DEVSTR "AR71XX Integrated USB 2.0 controller"
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struct ar71xx_ehci_softc {
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ehci_softc_t base; /* storage for EHCI code */
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};
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static device_attach_t ar71xx_ehci_attach;
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static device_detach_t ar71xx_ehci_detach;
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static device_shutdown_t ar71xx_ehci_shutdown;
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static device_suspend_t ar71xx_ehci_suspend;
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static device_resume_t ar71xx_ehci_resume;
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bs_r_1_proto(reversed);
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bs_w_1_proto(reversed);
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static int
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ar71xx_ehci_suspend(device_t self)
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{
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ehci_softc_t *sc = device_get_softc(self);
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int err;
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err = bus_generic_suspend(self);
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if (err)
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return (err);
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ehci_suspend(sc);
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return (0);
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}
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static int
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ar71xx_ehci_resume(device_t self)
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{
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ehci_softc_t *sc = device_get_softc(self);
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ehci_resume(sc);
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bus_generic_resume(self);
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return (0);
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}
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static int
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ar71xx_ehci_shutdown(device_t self)
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{
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ehci_softc_t *sc = device_get_softc(self);
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int err;
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err = bus_generic_shutdown(self);
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if (err)
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return (err);
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ehci_shutdown(sc);
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return (0);
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}
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static int
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ar71xx_ehci_probe(device_t self)
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{
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device_set_desc(self, EHCI_HC_DEVSTR);
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printf("EHCI probed\n");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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ar71xx_ehci_attach(device_t self)
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{
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struct ar71xx_ehci_softc *isc = device_get_softc(self);
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ehci_softc_t *sc = &isc->base;
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int err;
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int rid;
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printf("EHCI attach\n");
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/* initialise some bus fields */
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sc->sc_bus.parent = self;
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sc->sc_bus.devices = sc->sc_devices;
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sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
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/* get all DMA memory */
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if (usb2_bus_mem_alloc_all(&sc->sc_bus,
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USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
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return (ENOMEM);
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}
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sc->sc_bus.usbrev = USB_REV_2_0;
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/* NB: hints fix the memory location and irq */
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rid = 0;
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sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
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if (!sc->sc_io_res) {
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device_printf(self, "Could not map memory\n");
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goto error;
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}
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/*
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* Craft special resource for bus space ops that handle
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* byte-alignment of non-word addresses.
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*/
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sc->sc_io_tag = &ar71xx_bus_space_reversed;
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sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
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sc->sc_io_size = rman_get_size(sc->sc_io_res);
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rid = 0;
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sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
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RF_ACTIVE);
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if (sc->sc_irq_res == NULL) {
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device_printf(self, "Could not allocate irq\n");
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goto error;
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}
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sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
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if (!sc->sc_bus.bdev) {
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device_printf(self, "Could not add USB device\n");
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goto error;
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}
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device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
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device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
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sprintf(sc->sc_vendor, "Atheros");
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err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
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NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
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if (err) {
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device_printf(self, "Could not setup irq, %d\n", err);
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sc->sc_intr_hdl = NULL;
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goto error;
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}
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/*
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* Arrange to force Host mode, select big-endian byte alignment,
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* and arrange to not terminate reset operations (the adapter
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* will ignore it if we do but might as well save a reg write).
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* Also, the controller has an embedded Transaction Translator
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* which means port speed must be read from the Port Status
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* register following a port enable.
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*/
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sc->sc_flags |= EHCI_SCFLG_TT
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| EHCI_SCFLG_SETMODE
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| EHCI_SCFLG_BIGEDESC
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| EHCI_SCFLG_BIGEMMIO
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| EHCI_SCFLG_NORESTERM
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;
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(void) ehci_reset(sc);
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err = ehci_init(sc);
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if (!err) {
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err = device_probe_and_attach(sc->sc_bus.bdev);
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}
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if (err) {
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device_printf(self, "USB init failed err=%d\n", err);
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goto error;
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}
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return (0);
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error:
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ar71xx_ehci_detach(self);
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return (ENXIO);
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}
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static int
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ar71xx_ehci_detach(device_t self)
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{
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struct ar71xx_ehci_softc *isc = device_get_softc(self);
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ehci_softc_t *sc = &isc->base;
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device_t bdev;
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int err;
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if (sc->sc_bus.bdev) {
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bdev = sc->sc_bus.bdev;
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device_detach(bdev);
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device_delete_child(self, bdev);
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}
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/* during module unload there are lots of children leftover */
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device_delete_all_children(self);
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/*
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* disable interrupts that might have been switched on in ehci_init
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*/
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if (sc->sc_io_res) {
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EWRITE4(sc, EHCI_USBINTR, 0);
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}
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if (sc->sc_irq_res && sc->sc_intr_hdl) {
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/*
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* only call ehci_detach() after ehci_init()
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*/
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ehci_detach(sc);
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err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
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if (err)
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/* XXX or should we panic? */
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device_printf(self, "Could not tear down irq, %d\n",
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err);
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sc->sc_intr_hdl = NULL;
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}
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if (sc->sc_irq_res) {
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bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
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sc->sc_irq_res = NULL;
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}
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if (sc->sc_io_res) {
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bus_release_resource(self, SYS_RES_MEMORY, 0,
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sc->sc_io_res);
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sc->sc_io_res = NULL;
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}
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usb2_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
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return (0);
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}
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static device_method_t ehci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, ar71xx_ehci_probe),
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DEVMETHOD(device_attach, ar71xx_ehci_attach),
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DEVMETHOD(device_detach, ar71xx_ehci_detach),
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DEVMETHOD(device_suspend, ar71xx_ehci_suspend),
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DEVMETHOD(device_resume, ar71xx_ehci_resume),
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DEVMETHOD(device_shutdown, ar71xx_ehci_shutdown),
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/* Bus interface */
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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{0, 0}
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};
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static driver_t ehci_driver = {
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"ehci",
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ehci_methods,
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sizeof(struct ar71xx_ehci_softc),
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};
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static devclass_t ehci_devclass;
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DRIVER_MODULE(ehci, nexus, ehci_driver, ehci_devclass, 0, 0);
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MODULE_DEPEND(ehci, usb, 1, 1, 1);
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mips/atheros/apb.c standard
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mips/atheros/ar71xx_machdep.c standard
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mips/atheros/ar71xx_ehci.c optional ehci
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mips/atheros/ar71xx_ohci.c optional ohci
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mips/atheros/ar71xx_pci.c optional pci
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mips/atheros/if_arge.c optional arge
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