arm: ti am335x ehrpwm add support for flags (PWM_POLARITY_INVERTED)
Add support for invert the polarity of the PWM signal. Cleanup and add comments in the initialization code. Add and fix register defines. Approved by: manu (mentor) Differential revision: https://reviews.freebsd.org/D29547
This commit is contained in:
Oskar Holmlund
parent
dbaf4b6539
commit
e7424879e3
@ -44,6 +44,8 @@ __FBSDID("$FreeBSD$");
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/pwm/pwmc.h>
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#include "pwmbus_if.h"
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#include "am335x_pwm.h"
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@ -72,7 +74,12 @@ __FBSDID("$FreeBSD$");
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bus_write_2((_sc)->sc_mem_res, reg, value)
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#define EPWM_TBCTL 0x00
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#define TBCTL_FREERUN (2 << 14)
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/* see 15.2.2.11 for the first two, used in debug situations */
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#define TBCTL_FREERUN_STOP_NEXT_TBC_INCREMENT (0 << 14)
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#define TBCTL_FREERUN_STOP_COMPLETE_CYCLE (1 << 14)
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/* ignore suspend control signal */
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#define TBCTL_FREERUN (2 << 14)
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#define TBCTL_PHDIR_UP (1 << 13)
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#define TBCTL_PHDIR_DOWN (0 << 13)
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#define TBCTL_CLKDIV(x) ((x) << 10)
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@ -81,9 +88,9 @@ __FBSDID("$FreeBSD$");
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#define TBCTL_HSPCLKDIV_MASK (3 << 7)
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#define TBCTL_SYNCOSEL_DISABLED (3 << 4)
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#define TBCTL_PRDLD_SHADOW (0 << 3)
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#define TBCTL_PRDLD_IMMEDIATE (0 << 3)
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#define TBCTL_PHSEN_ENABLED (1 << 2)
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#define TBCTL_PRDLD_IMMEDIATE (1 << 3)
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#define TBCTL_PHSEN_DISABLED (0 << 2)
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#define TBCTL_PHSEN_ENABLED (1 << 2)
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#define TBCTL_CTRMODE_MASK (3)
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#define TBCTL_CTRMODE_UP (0 << 0)
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#define TBCTL_CTRMODE_DOWN (1 << 0)
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@ -136,8 +143,24 @@ __FBSDID("$FreeBSD$");
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#define AQCSFRC(chan, hilo) ((hilo) << (2 * chan))
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/* Trip-Zone module */
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#define EPWM_TZSEL 0x24
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#define EPWM_TZCTL 0x28
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#define EPWM_TZFLG 0x2C
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/* Dead band */
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#define EPWM_DBCTL 0x1E
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#define DBCTL_MASK (3 << 0)
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#define DBCTL_BYPASS 0
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#define DBCTL_RISING_EDGE 1
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#define DBCTL_FALLING_EDGE 2
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#define DBCTL_BOTH_EDGE 3
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/* PWM-chopper */
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#define EPWM_PCCTL 0x3C
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#define PCCTL_CHPEN_MASK (1 << 0)
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#define PCCTL_CHPEN_DISABLE 0
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#define PCCTL_CHPEN_ENABLE 1
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/* High-Resolution PWM */
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#define EPWM_HRCTL 0x40
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#define HRCTL_DELMODE_BOTH 3
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@ -329,6 +352,60 @@ am335x_ehrpwm_channel_get_config(device_t dev, u_int channel,
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return (0);
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}
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static int
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am335x_ehrpwm_channel_set_flags(device_t dev, u_int channel,
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uint32_t flags)
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{
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struct am335x_ehrpwm_softc *sc;
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if (channel >= NUM_CHANNELS)
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return (EINVAL);
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sc = device_get_softc(dev);
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PWM_LOCK(sc);
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if (flags & PWM_POLARITY_INVERTED) {
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sc->sc_channels[channel].inverted = true;
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/* Action-Qualifier 15.2.2.5 */
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if (channel == 0)
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EPWM_WRITE2(sc, EPWM_AQCTLA,
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(AQCTL_ZRO_CLEAR | AQCTL_CAU_SET));
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else
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EPWM_WRITE2(sc, EPWM_AQCTLB,
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(AQCTL_ZRO_CLEAR | AQCTL_CBU_SET));
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} else {
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sc->sc_channels[channel].inverted = false;
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if (channel == 0)
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EPWM_WRITE2(sc, EPWM_AQCTLA,
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(AQCTL_ZRO_SET | AQCTL_CAU_CLEAR));
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else
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EPWM_WRITE2(sc, EPWM_AQCTLB,
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(AQCTL_ZRO_SET | AQCTL_CBU_CLEAR));
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}
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PWM_UNLOCK(sc);
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return (0);
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}
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static int
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am335x_ehrpwm_channel_get_flags(device_t dev, u_int channel,
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uint32_t *flags)
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{
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struct am335x_ehrpwm_softc *sc;
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if (channel >= NUM_CHANNELS)
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return (EINVAL);
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sc = device_get_softc(dev);
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if (sc->sc_channels[channel].inverted == true)
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*flags = PWM_POLARITY_INVERTED;
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else
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*flags = 0;
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return (0);
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}
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static int
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am335x_ehrpwm_channel_enable(device_t dev, u_int channel, bool enable)
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{
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@ -380,7 +457,7 @@ static int
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am335x_ehrpwm_attach(device_t dev)
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{
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struct am335x_ehrpwm_softc *sc;
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uint32_t reg;
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uint16_t reg;
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sc = device_get_softc(dev);
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sc->sc_dev = dev;
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@ -394,7 +471,7 @@ am335x_ehrpwm_attach(device_t dev)
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goto fail;
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}
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/* CONFIGURE EPWM1 */
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/* CONFIGURE EPWM */
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reg = EPWM_READ2(sc, EPWM_TBCTL);
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reg &= ~(TBCTL_CLKDIV_MASK | TBCTL_HSPCLKDIV_MASK);
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EPWM_WRITE2(sc, EPWM_TBCTL, reg);
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@ -403,17 +480,40 @@ am335x_ehrpwm_attach(device_t dev)
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EPWM_WRITE2(sc, EPWM_CMPA, 0);
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EPWM_WRITE2(sc, EPWM_CMPB, 0);
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/* Action-Qualifier 15.2.2.5 */
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EPWM_WRITE2(sc, EPWM_AQCTLA, (AQCTL_ZRO_SET | AQCTL_CAU_CLEAR));
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EPWM_WRITE2(sc, EPWM_AQCTLB, (AQCTL_ZRO_SET | AQCTL_CBU_CLEAR));
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/* Dead band 15.2.2.6 */
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reg = EPWM_READ2(sc, EPWM_DBCTL);
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reg &= ~DBCTL_MASK;
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reg |= DBCTL_BYPASS;
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EPWM_WRITE2(sc, EPWM_DBCTL, reg);
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/* PWM-chopper described in 15.2.2.7 */
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/* Acc. TRM used in pulse transformerbased gate drivers
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* to control the power switching-elements
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*/
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reg = EPWM_READ2(sc, EPWM_PCCTL);
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reg &= ~PCCTL_CHPEN_MASK;
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reg |= PCCTL_CHPEN_DISABLE;
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EPWM_WRITE2(sc, EPWM_PCCTL, PCCTL_CHPEN_DISABLE);
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/* Trip zone are described in 15.2.2.8.
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* Essential its used to detect faults and can be configured
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* to react on such faults..
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*/
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/* disable TZn as one-shot / CVC trip source 15.2.4.18 */
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EPWM_WRITE2(sc, EPWM_TZSEL, 0x0);
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/* reg described in 15.2.4.19 */
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EPWM_WRITE2(sc, EPWM_TZCTL, 0xf);
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reg = EPWM_READ2(sc, EPWM_TZFLG);
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/* START EPWM */
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reg &= ~TBCTL_CTRMODE_MASK;
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reg |= TBCTL_CTRMODE_UP | TBCTL_FREERUN;
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EPWM_WRITE2(sc, EPWM_TBCTL, reg);
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EPWM_WRITE2(sc, EPWM_TZCTL, 0xf);
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reg = EPWM_READ2(sc, EPWM_TZFLG);
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if ((sc->sc_busdev = device_add_child(dev, "pwmbus", -1)) == NULL) {
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device_printf(dev, "Cannot add child pwmbus\n");
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// This driver can still do things even without the bus child.
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@ -480,6 +580,8 @@ static device_method_t am335x_ehrpwm_methods[] = {
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DEVMETHOD(pwmbus_channel_count, am335x_ehrpwm_channel_count),
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DEVMETHOD(pwmbus_channel_config, am335x_ehrpwm_channel_config),
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DEVMETHOD(pwmbus_channel_get_config, am335x_ehrpwm_channel_get_config),
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DEVMETHOD(pwmbus_channel_set_flags, am335x_ehrpwm_channel_set_flags),
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DEVMETHOD(pwmbus_channel_get_flags, am335x_ehrpwm_channel_get_flags),
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DEVMETHOD(pwmbus_channel_enable, am335x_ehrpwm_channel_enable),
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DEVMETHOD(pwmbus_channel_is_enabled, am335x_ehrpwm_channel_is_enabled),
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