diff --git a/sys/amd64/amd64/identcpu.c b/sys/amd64/amd64/identcpu.c
index 0b190f39cf14..359eed2398dc 100644
--- a/sys/amd64/amd64/identcpu.c
+++ b/sys/amd64/amd64/identcpu.c
@@ -36,7 +36,7 @@
  * SUCH DAMAGE.
  *
  *	from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp
- *	$Id: identcpu.c,v 1.39 1998/01/25 12:01:10 kato Exp $
+ *	$Id: identcpu.c,v 1.40 1998/01/25 17:01:31 kato Exp $
  */
 
 #include "opt_cpu.h"
@@ -664,8 +664,6 @@ void
 finishidentcpu(void)
 {
 	int	isblue = 0;
-	u_int	ccr3;
-	u_int	eax, ebx, ecx, edx;
 
 	if (strcmp(cpu_vendor, "CyrixInstead") == 0) {
 		if (cpu == CPU_486) {
@@ -721,18 +719,11 @@ finishidentcpu(void)
 			default:
 				/* M2 and later CPUs are treated as M2. */
 				cpu = CPU_M2;
-				eax = 1;
-
 				/*
-				 * enable cpuid instruction.
+				 * XXX
+				 * Execute cpuid instrunction here and fix cpu_id and
+				 * cpu_feature variables.
 				 */
-				ccr3 = read_cyrix_reg(CCR3);
-				write_cyrix_reg(CCR3, CCR3_MAPEN0);
-				write_cyrix_reg(CCR4, read_cyrix_reg(CCR4) | CCR4_CPUID);
-				write_cyrix_reg(CCR3, ccr3);
-				cpuid(&eax, &ebx, &ecx, &edx);
-				cpu_id = eax;
-				cpu_feature = edx;
 				break;
 			}
 		}
diff --git a/sys/amd64/include/cpufunc.h b/sys/amd64/include/cpufunc.h
index 0aa8e74d7f65..22e4c279414b 100644
--- a/sys/amd64/include/cpufunc.h
+++ b/sys/amd64/include/cpufunc.h
@@ -30,7 +30,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- *	$Id: cpufunc.h,v 1.74 1998/01/15 07:32:55 gibbs Exp $
+ *	$Id: cpufunc.h,v 1.75 1998/01/25 17:02:00 kato Exp $
  */
 
 /*
@@ -57,14 +57,6 @@ breakpoint(void)
 	__asm __volatile("int $3");
 }
 
-static __inline void
-cpuid(u_int *eax, u_int *ebx, u_int *ecx, u_int *edx)
-{
-	__asm __volatile(".byte 0x0f, 0xa2"
-			 : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
-			 : "a" (*eax));
-}
-
 static __inline void
 disable_intr(void)
 {
@@ -403,7 +395,6 @@ wrmsr(u_int msr, quad_t newval)
 #else /* !__GNUC__ */
 
 int	breakpoint	__P((void));
-void	cpuid		__P((u_int *eax, u_int *ebx, u_int *ecx, u_int *edx));
 void	disable_intr	__P((void));
 void	enable_intr	__P((void));
 u_char	inb		__P((u_int port));
diff --git a/sys/i386/i386/identcpu.c b/sys/i386/i386/identcpu.c
index 0b190f39cf14..359eed2398dc 100644
--- a/sys/i386/i386/identcpu.c
+++ b/sys/i386/i386/identcpu.c
@@ -36,7 +36,7 @@
  * SUCH DAMAGE.
  *
  *	from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp
- *	$Id: identcpu.c,v 1.39 1998/01/25 12:01:10 kato Exp $
+ *	$Id: identcpu.c,v 1.40 1998/01/25 17:01:31 kato Exp $
  */
 
 #include "opt_cpu.h"
@@ -664,8 +664,6 @@ void
 finishidentcpu(void)
 {
 	int	isblue = 0;
-	u_int	ccr3;
-	u_int	eax, ebx, ecx, edx;
 
 	if (strcmp(cpu_vendor, "CyrixInstead") == 0) {
 		if (cpu == CPU_486) {
@@ -721,18 +719,11 @@ finishidentcpu(void)
 			default:
 				/* M2 and later CPUs are treated as M2. */
 				cpu = CPU_M2;
-				eax = 1;
-
 				/*
-				 * enable cpuid instruction.
+				 * XXX
+				 * Execute cpuid instrunction here and fix cpu_id and
+				 * cpu_feature variables.
 				 */
-				ccr3 = read_cyrix_reg(CCR3);
-				write_cyrix_reg(CCR3, CCR3_MAPEN0);
-				write_cyrix_reg(CCR4, read_cyrix_reg(CCR4) | CCR4_CPUID);
-				write_cyrix_reg(CCR3, ccr3);
-				cpuid(&eax, &ebx, &ecx, &edx);
-				cpu_id = eax;
-				cpu_feature = edx;
 				break;
 			}
 		}
diff --git a/sys/i386/include/cpufunc.h b/sys/i386/include/cpufunc.h
index 0aa8e74d7f65..22e4c279414b 100644
--- a/sys/i386/include/cpufunc.h
+++ b/sys/i386/include/cpufunc.h
@@ -30,7 +30,7 @@
  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
  *
- *	$Id: cpufunc.h,v 1.74 1998/01/15 07:32:55 gibbs Exp $
+ *	$Id: cpufunc.h,v 1.75 1998/01/25 17:02:00 kato Exp $
  */
 
 /*
@@ -57,14 +57,6 @@ breakpoint(void)
 	__asm __volatile("int $3");
 }
 
-static __inline void
-cpuid(u_int *eax, u_int *ebx, u_int *ecx, u_int *edx)
-{
-	__asm __volatile(".byte 0x0f, 0xa2"
-			 : "=a" (*eax), "=b" (*ebx), "=c" (*ecx), "=d" (*edx)
-			 : "a" (*eax));
-}
-
 static __inline void
 disable_intr(void)
 {
@@ -403,7 +395,6 @@ wrmsr(u_int msr, quad_t newval)
 #else /* !__GNUC__ */
 
 int	breakpoint	__P((void));
-void	cpuid		__P((u_int *eax, u_int *ebx, u_int *ecx, u_int *edx));
 void	disable_intr	__P((void));
 void	enable_intr	__P((void));
 u_char	inb		__P((u_int port));