Add support for the Intel 865 chipset.
MFC after: 3 days Sponsored by: The Weather Channel Approved by: re (murray)
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@ -98,6 +98,9 @@ agp_intel_match(device_t dev)
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case 0x25318086:
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return ("Intel 82860 host to AGP bridge");
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case 0x25708086:
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return ("Intel 82865 host to AGP bridge");
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};
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if (pci_get_vendor(dev) == 0x8086)
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@ -167,7 +170,8 @@ agp_intel_attach(device_t dev)
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pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2280, 4);
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break;
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default:
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pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x0080, 4);
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value = pci_read_config(dev, AGP_INTEL_AGPCTRL, 4);
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pci_write_config(dev, AGP_INTEL_AGPCTRL, value | 0x80, 4);
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}
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/* Enable things, clear errors etc. */
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@ -188,6 +192,7 @@ agp_intel_attach(device_t dev)
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break;
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case 0x1a308086: /* i845 */
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case 0x25708086: /* i865 */
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pci_write_config(dev, AGP_INTEL_I845_MCHCFG,
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(pci_read_config(dev, AGP_INTEL_I845_MCHCFG, 1)
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| (1 << 1)), 1);
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@ -209,7 +214,8 @@ agp_intel_attach(device_t dev)
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case 0x1a308086: /* i845 */
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case 0x25308086: /* i850 */
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case 0x25318086: /* i860 */
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pci_write_config(dev, AGP_INTEL_I8XX_ERRSTS, 0x001c, 2);
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case 0x25708086: /* i865 */
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pci_write_config(dev, AGP_INTEL_I8XX_ERRSTS, 0x00ff, 2);
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break;
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default: /* Intel Generic (maybe) */
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@ -251,6 +257,7 @@ agp_intel_detach(device_t dev)
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& ~(1 << 1)), 1);
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case 0x1a308086: /* i845 */
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case 0x25708086: /* i865 */
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printf("%s: set MCHCFG to %x\n", __func__, (unsigned)
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(pci_read_config(dev, AGP_INTEL_I845_MCHCFG, 1)
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& ~(1 << 1)));
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@ -57,7 +57,7 @@
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#define AGP_INTEL_ATTBASE 0xb8
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/*
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* Config offsets for Intel i820/i840/i845/i850/i860 AGP chipsets.
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* Config offsets for Intel i820/i840/i845/i850/i860/i865 AGP chipsets.
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*/
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#define AGP_INTEL_MCHCFG 0x50
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#define AGP_INTEL_I820_RDCR 0x51
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@ -98,6 +98,9 @@ agp_intel_match(device_t dev)
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case 0x25318086:
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return ("Intel 82860 host to AGP bridge");
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case 0x25708086:
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return ("Intel 82865 host to AGP bridge");
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};
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if (pci_get_vendor(dev) == 0x8086)
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@ -167,7 +170,8 @@ agp_intel_attach(device_t dev)
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pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x2280, 4);
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break;
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default:
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pci_write_config(dev, AGP_INTEL_AGPCTRL, 0x0080, 4);
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value = pci_read_config(dev, AGP_INTEL_AGPCTRL, 4);
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pci_write_config(dev, AGP_INTEL_AGPCTRL, value | 0x80, 4);
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}
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/* Enable things, clear errors etc. */
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@ -188,6 +192,7 @@ agp_intel_attach(device_t dev)
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break;
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case 0x1a308086: /* i845 */
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case 0x25708086: /* i865 */
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pci_write_config(dev, AGP_INTEL_I845_MCHCFG,
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(pci_read_config(dev, AGP_INTEL_I845_MCHCFG, 1)
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| (1 << 1)), 1);
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@ -209,7 +214,8 @@ agp_intel_attach(device_t dev)
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case 0x1a308086: /* i845 */
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case 0x25308086: /* i850 */
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case 0x25318086: /* i860 */
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pci_write_config(dev, AGP_INTEL_I8XX_ERRSTS, 0x001c, 2);
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case 0x25708086: /* i865 */
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pci_write_config(dev, AGP_INTEL_I8XX_ERRSTS, 0x00ff, 2);
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break;
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default: /* Intel Generic (maybe) */
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@ -251,6 +257,7 @@ agp_intel_detach(device_t dev)
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& ~(1 << 1)), 1);
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case 0x1a308086: /* i845 */
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case 0x25708086: /* i865 */
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printf("%s: set MCHCFG to %x\n", __func__, (unsigned)
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(pci_read_config(dev, AGP_INTEL_I845_MCHCFG, 1)
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& ~(1 << 1)));
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@ -57,7 +57,7 @@
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#define AGP_INTEL_ATTBASE 0xb8
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/*
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* Config offsets for Intel i820/i840/i845/i850/i860 AGP chipsets.
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* Config offsets for Intel i820/i840/i845/i850/i860/i865 AGP chipsets.
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*/
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#define AGP_INTEL_MCHCFG 0x50
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#define AGP_INTEL_I820_RDCR 0x51
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