Make a macro for the guts of tl0_immu_miss, like dmmu_miss and prot.
Rearrange things slightly so that the contents of the tag access register are read and restored outside of the macros. The intention is to pass the page size to look up as an argument to the macros.
This commit is contained in:
Jake Burkholder
parent
76fdd728b6
commit
ea4ad4bb29
@ -543,19 +543,7 @@ END(tl0_sfsr_trap)
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.align 32
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.endm
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.macro tl0_immu_miss
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/*
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* Force kernel store order.
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*/
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wrpr %g0, PSTATE_MMU, %pstate
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/*
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* Load the virtual page number and context from the tag access
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* register. We ignore the context.
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*/
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wr %g0, ASI_IMMU, %asi
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ldxa [%g0 + AA_IMMU_TAR] %asi, %g2
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.macro immu_miss_user
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/*
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* Extract the virtual page number from the contents of the tag
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* access register.
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@ -623,13 +611,22 @@ END(tl0_sfsr_trap)
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andcc %g1, (1 << (TSB_BUCKET_SHIFT + TTE_SHIFT)) - 1, %g0
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bnz,a,pt %xcc, 1b
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nop
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.endm
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.macro tl0_immu_miss
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/*
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* Force kernel store order.
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*/
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wrpr %g0, PSTATE_MMU, %pstate
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/*
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* Put back the contents of the tag access register, in case we
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* faulted.
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* Load the virtual page number and context from the tag access
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* register. We ignore the context.
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*/
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stxa %g2, [%g0 + AA_IMMU_TAR] %asi
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membar #Sync
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wr %g0, ASI_IMMU, %asi
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ldxa [%g0 + AA_IMMU_TAR] %asi, %g2
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immu_miss_user
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b,a %xcc, tl0_immu_miss_trap
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nop
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@ -657,6 +654,13 @@ ENTRY(tl0_immu_miss_set_ref)
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END(tl0_immu_miss_set_ref)
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ENTRY(tl0_immu_miss_trap)
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/*
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* Put back the contents of the tag access register, in case we
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* faulted.
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*/
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stxa %g2, [%g0 + AA_IMMU_TAR] %asi
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membar #Sync
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/*
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* Switch to alternate globals.
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*/
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@ -677,13 +681,6 @@ ENTRY(tl0_immu_miss_trap)
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END(tl0_immu_miss_trap)
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.macro dmmu_miss_user
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/*
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* Load the virtual page number and context from the tag access
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* register. We ignore the context.
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*/
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wr %g0, ASI_DMMU, %asi
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ldxa [%g0 + AA_DMMU_TAR] %asi, %g2
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/*
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* Extract the virtual page number from the contents of the tag
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* access register.
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@ -748,13 +745,6 @@ END(tl0_immu_miss_trap)
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andcc %g1, (1 << (TSB_BUCKET_SHIFT + TTE_SHIFT)) - 1, %g0
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bnz,a,pt %xcc, 1b
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nop
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/*
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* Put back the contents of the tag access register, in case we
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* faulted.
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*/
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stxa %g2, [%g0 + AA_DMMU_TAR] %asi
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membar #Sync
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.endm
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ENTRY(dmmu_miss_user_set_ref)
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@ -783,6 +773,13 @@ END(dmmu_miss_user_set_ref)
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*/
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wrpr %g0, PSTATE_MMU, %pstate
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/*
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* Load the virtual page number and context from the tag access
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* register. We ignore the context.
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*/
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wr %g0, ASI_DMMU, %asi
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ldxa [%g0 + AA_DMMU_TAR] %asi, %g2
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/*
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* Try a fast inline lookup of the primary tsb.
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*/
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@ -797,6 +794,13 @@ END(dmmu_miss_user_set_ref)
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.endm
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ENTRY(tl0_dmmu_miss_trap)
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/*
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* Put back the contents of the tag access register, in case we
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* faulted.
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*/
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stxa %g2, [%g0 + AA_DMMU_TAR] %asi
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membar #Sync
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/*
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* Switch to alternate globals.
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*/
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@ -817,13 +821,6 @@ ENTRY(tl0_dmmu_miss_trap)
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END(tl0_dmmu_miss_trap)
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.macro dmmu_prot_user
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/*
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* Load the virtual page number and context from the tag access
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* register. We ignore the context.
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*/
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wr %g0, ASI_DMMU, %asi
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ldxa [%g0 + AA_DMMU_TAR] %asi, %g2
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/*
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* Extract the virtual page number from the contents of the tag
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* access register.
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@ -879,13 +876,6 @@ END(tl0_dmmu_miss_trap)
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andcc %g1, (1 << (TSB_BUCKET_SHIFT + TTE_SHIFT)) - 1, %g0
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bnz,a,pt %xcc, 1b
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nop
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/*
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* Put back the contents of the tag access register, in case we
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* faulted.
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*/
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stxa %g2, [%g0 + AA_DMMU_TAR] %asi
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membar #Sync
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.endm
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.macro tl0_dmmu_prot
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@ -894,6 +884,13 @@ END(tl0_dmmu_miss_trap)
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*/
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wrpr %g0, PSTATE_MMU, %pstate
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/*
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* Load the virtual page number and context from the tag access
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* register. We ignore the context.
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*/
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wr %g0, ASI_DMMU, %asi
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ldxa [%g0 + AA_DMMU_TAR] %asi, %g2
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/*
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* Try a fast inline lookup of the tsb.
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*/
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@ -936,6 +933,13 @@ ENTRY(dmmu_prot_set_w)
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END(dmmu_prot_set_w)
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ENTRY(tl0_dmmu_prot_trap)
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/*
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* Put back the contents of the tag access register, in case we
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* faulted.
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*/
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stxa %g2, [%g0 + AA_DMMU_TAR] %asi
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membar #Sync
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/*
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* Switch to alternate globals.
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*/
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@ -1330,13 +1334,14 @@ END(tl1_immu_miss_trap)
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* the virtual page number.
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*/
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sllx %g6, 64 - TAR_VPN_SHIFT, %g5
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brnz,pn %g5, tl1_dmmu_miss_user
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srlx %g6, TAR_VPN_SHIFT, %g6
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brnz,a,pn %g5, tl1_dmmu_miss_user
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mov %g6, %g2
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/*
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* Find the index into the kernel tsb.
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*/
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set TSB_KERNEL_MASK, %g4
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srlx %g6, TAR_VPN_SHIFT, %g6
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and %g6, %g4, %g3
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/*
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@ -1403,6 +1408,13 @@ ENTRY(tl1_dmmu_miss_user)
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*/
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dmmu_miss_user
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/*
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* Put back the contents of the tag access register, in case we
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* faulted.
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*/
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stxa %g2, [%g0 + AA_DMMU_TAR] %asi
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membar #Sync
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/*
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* Switch to alternate globals.
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*/
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@ -1438,13 +1450,14 @@ END(tl1_dmmu_miss_user)
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* the virtual page number.
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*/
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sllx %g6, 64 - TAR_VPN_SHIFT, %g5
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brnz,pn %g5, tl1_dmmu_prot_user
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srlx %g6, TAR_VPN_SHIFT, %g6
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brnz,a,pn %g5, tl1_dmmu_prot_user
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mov %g6, %g2
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/*
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* Find the index into the kernel tsb.
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*/
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set TSB_KERNEL_MASK, %g4
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srlx %g6, TAR_VPN_SHIFT, %g6
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and %g6, %g4, %g5
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/*
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@ -1479,6 +1492,12 @@ END(tl1_dmmu_miss_user)
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stxa %g0, [%g0 + AA_DMMU_SFSR] %asi
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membar #Sync
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ba,a %xcc, tl1_dmmu_prot_cont
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nop
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.align 128
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.endm
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ENTRY(tl1_dmmu_prot_cont)
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/*
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* Set the hardware write bit.
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*/
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@ -1490,8 +1509,7 @@ END(tl1_dmmu_miss_user)
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or %g5, TD_W, %g5
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stxa %g5, [%g0] ASI_DTLB_DATA_IN_REG
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retry
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.align 128
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.endm
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END(tl1_dmmu_prot_cont)
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ENTRY(tl1_dmmu_prot_user)
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/*
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@ -1499,6 +1517,13 @@ ENTRY(tl1_dmmu_prot_user)
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*/
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dmmu_prot_user
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/*
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* Put back the contents of the tag access register, in case we
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* faulted.
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*/
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stxa %g2, [%g0 + AA_DMMU_TAR] %asi
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membar #Sync
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/*
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* Switch to alternate globals.
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*/
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@ -543,19 +543,7 @@ END(tl0_sfsr_trap)
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.align 32
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.endm
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.macro tl0_immu_miss
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/*
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* Force kernel store order.
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*/
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wrpr %g0, PSTATE_MMU, %pstate
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/*
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* Load the virtual page number and context from the tag access
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* register. We ignore the context.
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*/
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wr %g0, ASI_IMMU, %asi
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ldxa [%g0 + AA_IMMU_TAR] %asi, %g2
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.macro immu_miss_user
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/*
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* Extract the virtual page number from the contents of the tag
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* access register.
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@ -623,13 +611,22 @@ END(tl0_sfsr_trap)
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andcc %g1, (1 << (TSB_BUCKET_SHIFT + TTE_SHIFT)) - 1, %g0
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bnz,a,pt %xcc, 1b
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nop
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.endm
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.macro tl0_immu_miss
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/*
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* Force kernel store order.
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*/
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wrpr %g0, PSTATE_MMU, %pstate
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/*
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* Put back the contents of the tag access register, in case we
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* faulted.
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* Load the virtual page number and context from the tag access
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* register. We ignore the context.
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*/
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stxa %g2, [%g0 + AA_IMMU_TAR] %asi
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membar #Sync
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wr %g0, ASI_IMMU, %asi
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ldxa [%g0 + AA_IMMU_TAR] %asi, %g2
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immu_miss_user
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b,a %xcc, tl0_immu_miss_trap
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nop
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@ -657,6 +654,13 @@ ENTRY(tl0_immu_miss_set_ref)
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END(tl0_immu_miss_set_ref)
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ENTRY(tl0_immu_miss_trap)
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/*
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* Put back the contents of the tag access register, in case we
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* faulted.
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*/
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stxa %g2, [%g0 + AA_IMMU_TAR] %asi
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membar #Sync
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/*
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* Switch to alternate globals.
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*/
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@ -677,13 +681,6 @@ ENTRY(tl0_immu_miss_trap)
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END(tl0_immu_miss_trap)
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.macro dmmu_miss_user
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/*
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* Load the virtual page number and context from the tag access
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* register. We ignore the context.
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*/
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wr %g0, ASI_DMMU, %asi
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ldxa [%g0 + AA_DMMU_TAR] %asi, %g2
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/*
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* Extract the virtual page number from the contents of the tag
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* access register.
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@ -748,13 +745,6 @@ END(tl0_immu_miss_trap)
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andcc %g1, (1 << (TSB_BUCKET_SHIFT + TTE_SHIFT)) - 1, %g0
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bnz,a,pt %xcc, 1b
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nop
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/*
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* Put back the contents of the tag access register, in case we
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* faulted.
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*/
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stxa %g2, [%g0 + AA_DMMU_TAR] %asi
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membar #Sync
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.endm
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ENTRY(dmmu_miss_user_set_ref)
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@ -783,6 +773,13 @@ END(dmmu_miss_user_set_ref)
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*/
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wrpr %g0, PSTATE_MMU, %pstate
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/*
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* Load the virtual page number and context from the tag access
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* register. We ignore the context.
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*/
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wr %g0, ASI_DMMU, %asi
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ldxa [%g0 + AA_DMMU_TAR] %asi, %g2
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/*
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* Try a fast inline lookup of the primary tsb.
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*/
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@ -797,6 +794,13 @@ END(dmmu_miss_user_set_ref)
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.endm
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ENTRY(tl0_dmmu_miss_trap)
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/*
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* Put back the contents of the tag access register, in case we
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* faulted.
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*/
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stxa %g2, [%g0 + AA_DMMU_TAR] %asi
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membar #Sync
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/*
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* Switch to alternate globals.
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*/
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@ -817,13 +821,6 @@ ENTRY(tl0_dmmu_miss_trap)
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END(tl0_dmmu_miss_trap)
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.macro dmmu_prot_user
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/*
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* Load the virtual page number and context from the tag access
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* register. We ignore the context.
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*/
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wr %g0, ASI_DMMU, %asi
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ldxa [%g0 + AA_DMMU_TAR] %asi, %g2
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/*
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* Extract the virtual page number from the contents of the tag
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* access register.
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@ -879,13 +876,6 @@ END(tl0_dmmu_miss_trap)
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andcc %g1, (1 << (TSB_BUCKET_SHIFT + TTE_SHIFT)) - 1, %g0
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bnz,a,pt %xcc, 1b
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nop
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/*
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* Put back the contents of the tag access register, in case we
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* faulted.
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*/
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stxa %g2, [%g0 + AA_DMMU_TAR] %asi
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membar #Sync
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.endm
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.macro tl0_dmmu_prot
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@ -894,6 +884,13 @@ END(tl0_dmmu_miss_trap)
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*/
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wrpr %g0, PSTATE_MMU, %pstate
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/*
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* Load the virtual page number and context from the tag access
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* register. We ignore the context.
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*/
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wr %g0, ASI_DMMU, %asi
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ldxa [%g0 + AA_DMMU_TAR] %asi, %g2
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/*
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* Try a fast inline lookup of the tsb.
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*/
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@ -936,6 +933,13 @@ ENTRY(dmmu_prot_set_w)
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END(dmmu_prot_set_w)
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ENTRY(tl0_dmmu_prot_trap)
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/*
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* Put back the contents of the tag access register, in case we
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* faulted.
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*/
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stxa %g2, [%g0 + AA_DMMU_TAR] %asi
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membar #Sync
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/*
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* Switch to alternate globals.
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*/
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@ -1330,13 +1334,14 @@ END(tl1_immu_miss_trap)
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* the virtual page number.
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*/
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sllx %g6, 64 - TAR_VPN_SHIFT, %g5
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brnz,pn %g5, tl1_dmmu_miss_user
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srlx %g6, TAR_VPN_SHIFT, %g6
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brnz,a,pn %g5, tl1_dmmu_miss_user
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mov %g6, %g2
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/*
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* Find the index into the kernel tsb.
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*/
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set TSB_KERNEL_MASK, %g4
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srlx %g6, TAR_VPN_SHIFT, %g6
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and %g6, %g4, %g3
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/*
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@ -1403,6 +1408,13 @@ ENTRY(tl1_dmmu_miss_user)
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*/
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dmmu_miss_user
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/*
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* Put back the contents of the tag access register, in case we
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* faulted.
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*/
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stxa %g2, [%g0 + AA_DMMU_TAR] %asi
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membar #Sync
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/*
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* Switch to alternate globals.
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*/
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@ -1438,13 +1450,14 @@ END(tl1_dmmu_miss_user)
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* the virtual page number.
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*/
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sllx %g6, 64 - TAR_VPN_SHIFT, %g5
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brnz,pn %g5, tl1_dmmu_prot_user
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srlx %g6, TAR_VPN_SHIFT, %g6
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brnz,a,pn %g5, tl1_dmmu_prot_user
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mov %g6, %g2
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/*
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* Find the index into the kernel tsb.
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*/
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set TSB_KERNEL_MASK, %g4
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srlx %g6, TAR_VPN_SHIFT, %g6
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and %g6, %g4, %g5
|
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|
||||
/*
|
||||
@ -1479,6 +1492,12 @@ END(tl1_dmmu_miss_user)
|
||||
stxa %g0, [%g0 + AA_DMMU_SFSR] %asi
|
||||
membar #Sync
|
||||
|
||||
ba,a %xcc, tl1_dmmu_prot_cont
|
||||
nop
|
||||
.align 128
|
||||
.endm
|
||||
|
||||
ENTRY(tl1_dmmu_prot_cont)
|
||||
/*
|
||||
* Set the hardware write bit.
|
||||
*/
|
||||
@ -1490,8 +1509,7 @@ END(tl1_dmmu_miss_user)
|
||||
or %g5, TD_W, %g5
|
||||
stxa %g5, [%g0] ASI_DTLB_DATA_IN_REG
|
||||
retry
|
||||
.align 128
|
||||
.endm
|
||||
END(tl1_dmmu_prot_cont)
|
||||
|
||||
ENTRY(tl1_dmmu_prot_user)
|
||||
/*
|
||||
@ -1499,6 +1517,13 @@ ENTRY(tl1_dmmu_prot_user)
|
||||
*/
|
||||
dmmu_prot_user
|
||||
|
||||
/*
|
||||
* Put back the contents of the tag access register, in case we
|
||||
* faulted.
|
||||
*/
|
||||
stxa %g2, [%g0 + AA_DMMU_TAR] %asi
|
||||
membar #Sync
|
||||
|
||||
/*
|
||||
* Switch to alternate globals.
|
||||
*/
|
||||
|
||||
Loading…
Reference in New Issue
Block a user