- Second style(9) megacleanup.
- Rename "adapter" to "sc"/"softc", to be like other drivers. (-13 Kb less source code)
This commit is contained in:
parent
a7c959fe18
commit
eb0ec08982
3072
sys/dev/em/if_em.c
3072
sys/dev/em/if_em.c
File diff suppressed because it is too large
Load Diff
@ -146,7 +146,7 @@ POSSIBILITY OF SUCH DAMAGE.
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* This parameter controls when the driver calls the routine to reclaim
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* transmit descriptors.
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*/
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#define EM_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8)
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#define EM_TX_CLEANUP_THRESHOLD (sc->num_tx_desc / 8)
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/*
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* This parameter controls whether or not autonegotation is enabled.
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@ -217,6 +217,140 @@ POSSIBILITY OF SUCH DAMAGE.
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#define EM_MAX_SCATTER 64
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typedef enum _XSUM_CONTEXT_T {
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OFFLOAD_NONE,
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OFFLOAD_TCP_IP,
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OFFLOAD_UDP_IP
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} XSUM_CONTEXT_T;
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struct em_softc sc; /* XXX: ugly forward declaration */
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struct em_int_delay_info {
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struct em_softc *sc; /* XXX: ugly pointer */
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int offset; /* Register offset to read/write */
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int value; /* Current value in usecs */
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};
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/*
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* Bus dma allocation structure used by
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* em_dma_malloc() and em_dma_free().
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*/
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struct em_dma_alloc {
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bus_addr_t dma_paddr;
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caddr_t dma_vaddr;
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bus_dma_tag_t dma_tag;
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bus_dmamap_t dma_map;
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bus_dma_segment_t dma_seg;
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int dma_nseg;
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};
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/* Driver softc. */
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struct em_softc {
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struct ifnet *ifp;
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struct em_hw hw;
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/* FreeBSD operating-system-specific structures. */
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struct em_osdep osdep;
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struct device *dev;
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struct resource *res_memory;
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struct resource *res_ioport;
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struct resource *res_interrupt;
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void *int_handler_tag;
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struct ifmedia media;
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struct callout timer;
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struct callout tx_fifo_timer;
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int io_rid;
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struct mtx mtx;
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int em_insert_vlan_header;
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struct task link_task;
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struct task rxtx_task;
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struct taskqueue *tq; /* private task queue */
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/* Info about the board itself */
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uint32_t part_num;
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uint8_t link_active;
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uint16_t link_speed;
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uint16_t link_duplex;
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uint32_t smartspeed;
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struct em_int_delay_info tx_int_delay;
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struct em_int_delay_info tx_abs_int_delay;
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struct em_int_delay_info rx_int_delay;
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struct em_int_delay_info rx_abs_int_delay;
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XSUM_CONTEXT_T active_checksum_context;
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/*
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* Transmit definitions
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*
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* We have an array of num_tx_desc descriptors (handled
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* by the controller) paired with an array of tx_buffers
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* (at tx_buffer_area).
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* The index of the next available descriptor is next_avail_tx_desc.
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* The number of remaining tx_desc is num_tx_desc_avail.
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*/
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struct em_dma_alloc txdma; /* bus_dma glue for tx desc */
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struct em_tx_desc *tx_desc_base;
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uint32_t next_avail_tx_desc;
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uint32_t oldest_used_tx_desc;
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volatile uint16_t num_tx_desc_avail;
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uint16_t num_tx_desc;
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uint32_t txd_cmd;
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struct em_buffer *tx_buffer_area;
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bus_dma_tag_t txtag; /* dma tag for tx */
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/*
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* Receive definitions
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*
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* we have an array of num_rx_desc rx_desc (handled by the
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* controller), and paired with an array of rx_buffers
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* (at rx_buffer_area).
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* The next pair to check on receive is at offset next_rx_desc_to_check
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*/
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struct em_dma_alloc rxdma; /* bus_dma glue for rx desc */
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struct em_rx_desc *rx_desc_base;
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uint32_t next_rx_desc_to_check;
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uint32_t rx_buffer_len;
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uint16_t num_rx_desc;
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int rx_process_limit;
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struct em_buffer *rx_buffer_area;
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bus_dma_tag_t rxtag;
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/* First/last mbuf pointers, for collecting multisegment RX packets. */
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struct mbuf *fmp;
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struct mbuf *lmp;
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/* Misc stats maintained by the driver */
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unsigned long dropped_pkts;
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unsigned long mbuf_alloc_failed;
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unsigned long mbuf_cluster_failed;
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unsigned long no_tx_desc_avail1;
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unsigned long no_tx_desc_avail2;
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unsigned long no_tx_map_avail;
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unsigned long no_tx_dma_setup;
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unsigned long watchdog_events;
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unsigned long rx_overruns;
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/* Used in for 82547 10Mb Half workaround */
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#define EM_PBA_BYTES_SHIFT 0xA
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#define EM_TX_HEAD_ADDR_SHIFT 7
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#define EM_PBA_TX_MASK 0xFFFF0000
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#define EM_FIFO_HDR 0x10
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#define EM_82547_PKT_THRESH 0x3e0
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uint32_t tx_fifo_size;
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uint32_t tx_fifo_head;
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uint32_t tx_fifo_head_addr;
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uint64_t tx_fifo_reset_cnt;
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uint64_t tx_fifo_wrk_cnt;
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uint32_t tx_head_addr;
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/* For 82544 PCIX Workaround */
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boolean_t pcix_82544;
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boolean_t in_detach;
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struct em_hw_stats stats;
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};
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/* ******************************************************************************
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* vendor_info_array
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*
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@ -238,32 +372,6 @@ struct em_buffer {
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bus_dmamap_t map; /* bus_dma map for packet */
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};
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/*
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* Bus dma allocation structure used by
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* em_dma_malloc and em_dma_free.
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*/
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struct em_dma_alloc {
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bus_addr_t dma_paddr;
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caddr_t dma_vaddr;
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bus_dma_tag_t dma_tag;
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bus_dmamap_t dma_map;
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bus_dma_segment_t dma_seg;
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int dma_nseg;
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};
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typedef enum _XSUM_CONTEXT_T {
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OFFLOAD_NONE,
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OFFLOAD_TCP_IP,
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OFFLOAD_UDP_IP
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} XSUM_CONTEXT_T;
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struct adapter;
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struct em_int_delay_info {
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struct adapter *adapter; /* Back-pointer to the adapter struct */
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int offset; /* Register offset to read/write */
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int value; /* Current value in usecs */
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};
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/* For 82544 PCIX Workaround */
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typedef struct _ADDRESS_LENGTH_PAIR
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{
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@ -277,115 +385,6 @@ typedef struct _DESCRIPTOR_PAIR
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u_int32_t elements;
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} DESC_ARRAY, *PDESC_ARRAY;
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/* Our adapter structure */
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struct adapter {
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struct ifnet *ifp;
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struct em_hw hw;
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/* FreeBSD operating-system-specific structures */
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struct em_osdep osdep;
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struct device *dev;
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struct resource *res_memory;
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struct resource *res_ioport;
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struct resource *res_interrupt;
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void *int_handler_tag;
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struct ifmedia media;
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struct callout timer;
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struct callout tx_fifo_timer;
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int io_rid;
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u_int8_t unit;
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struct mtx mtx;
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int em_insert_vlan_header;
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struct task link_task;
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struct task rxtx_task;
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struct taskqueue *tq; /* private task queue */
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/* Info about the board itself */
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u_int32_t part_num;
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u_int8_t link_active;
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u_int16_t link_speed;
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u_int16_t link_duplex;
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u_int32_t smartspeed;
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struct em_int_delay_info tx_int_delay;
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struct em_int_delay_info tx_abs_int_delay;
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struct em_int_delay_info rx_int_delay;
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struct em_int_delay_info rx_abs_int_delay;
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XSUM_CONTEXT_T active_checksum_context;
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/*
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* Transmit definitions
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*
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* We have an array of num_tx_desc descriptors (handled
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* by the controller) paired with an array of tx_buffers
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* (at tx_buffer_area).
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* The index of the next available descriptor is next_avail_tx_desc.
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* The number of remaining tx_desc is num_tx_desc_avail.
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*/
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struct em_dma_alloc txdma; /* bus_dma glue for tx desc */
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struct em_tx_desc *tx_desc_base;
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u_int32_t next_avail_tx_desc;
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u_int32_t oldest_used_tx_desc;
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volatile u_int16_t num_tx_desc_avail;
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u_int16_t num_tx_desc;
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u_int32_t txd_cmd;
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struct em_buffer *tx_buffer_area;
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bus_dma_tag_t txtag; /* dma tag for tx */
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/*
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* Receive definitions
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*
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* we have an array of num_rx_desc rx_desc (handled by the
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* controller), and paired with an array of rx_buffers
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* (at rx_buffer_area).
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* The next pair to check on receive is at offset next_rx_desc_to_check
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*/
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struct em_dma_alloc rxdma; /* bus_dma glue for rx desc */
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struct em_rx_desc *rx_desc_base;
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u_int32_t next_rx_desc_to_check;
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u_int32_t rx_buffer_len;
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u_int16_t num_rx_desc;
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int rx_process_limit;
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struct em_buffer *rx_buffer_area;
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bus_dma_tag_t rxtag;
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/* Jumbo frame */
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struct mbuf *fmp;
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struct mbuf *lmp;
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/* Misc stats maintained by the driver */
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unsigned long dropped_pkts;
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unsigned long mbuf_alloc_failed;
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unsigned long mbuf_cluster_failed;
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unsigned long no_tx_desc_avail1;
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unsigned long no_tx_desc_avail2;
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unsigned long no_tx_map_avail;
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unsigned long no_tx_dma_setup;
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unsigned long watchdog_events;
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unsigned long rx_overruns;
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/* Used in for 82547 10Mb Half workaround */
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#define EM_PBA_BYTES_SHIFT 0xA
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#define EM_TX_HEAD_ADDR_SHIFT 7
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#define EM_PBA_TX_MASK 0xFFFF0000
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#define EM_FIFO_HDR 0x10
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#define EM_82547_PKT_THRESH 0x3e0
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u_int32_t tx_fifo_size;
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u_int32_t tx_fifo_head;
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u_int32_t tx_fifo_head_addr;
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u_int64_t tx_fifo_reset_cnt;
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u_int64_t tx_fifo_wrk_cnt;
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u_int32_t tx_head_addr;
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/* For 82544 PCIX Workaround */
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boolean_t pcix_82544;
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boolean_t in_detach;
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struct em_hw_stats stats;
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};
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#define EM_LOCK_INIT(_sc, _name) \
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mtx_init(&(_sc)->mtx, _name, MTX_NETWORK_LOCK, MTX_DEF)
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#define EM_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->mtx)
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@ -393,4 +392,4 @@ struct adapter {
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#define EM_UNLOCK(_sc) mtx_unlock(&(_sc)->mtx)
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#define EM_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->mtx, MA_OWNED)
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#endif /* _EM_H_DEFINED_ */
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#endif /* _EM_H_DEFINED_ */
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bus_space_handle_t mem_bus_space_handle;
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bus_space_tag_t io_bus_space_tag;
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bus_space_handle_t io_bus_space_handle;
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struct device *dev;
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device_t dev;
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};
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#define E1000_WRITE_FLUSH(hw) E1000_READ_REG(hw, STATUS)
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