backout 1.136 until we can resolve report that it causes output to stall
This commit is contained in:
Sam Leffler
parent
51b4ccb464
commit
ebecf80294
@ -1155,16 +1155,12 @@ ath_start(struct ifnet *ifp)
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*/
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ATH_TXBUF_LOCK(sc);
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bf = STAILQ_FIRST(&sc->sc_txbuf);
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if (bf != NULL) {
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if (bf->bf_flags & ATH_FLAG_BUSY)
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bf = NULL;
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else
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STAILQ_REMOVE_HEAD(&sc->sc_txbuf, bf_list);
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}
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if (bf != NULL)
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STAILQ_REMOVE_HEAD(&sc->sc_txbuf, bf_list);
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ATH_TXBUF_UNLOCK(sc);
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if (bf == NULL) {
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DPRINTF(sc, ATH_DEBUG_XMIT,
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"%s: no available xmit buffers\n", __func__);
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DPRINTF(sc, ATH_DEBUG_XMIT, "%s: out of xmit buffers\n",
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__func__);
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sc->sc_stats.ast_tx_qstop++;
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ifp->if_drv_flags |= IFF_DRV_OACTIVE;
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break;
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@ -1185,14 +1181,14 @@ ath_start(struct ifnet *ifp)
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ieee80211_state_name[ic->ic_state]);
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sc->sc_stats.ast_tx_discard++;
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ATH_TXBUF_LOCK(sc);
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STAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
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STAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
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ATH_TXBUF_UNLOCK(sc);
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break;
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}
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IFQ_DRV_DEQUEUE(&ifp->if_snd, m); /* XXX: LOCK */
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if (m == NULL) {
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ATH_TXBUF_LOCK(sc);
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STAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
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STAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
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ATH_TXBUF_UNLOCK(sc);
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break;
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}
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@ -1279,7 +1275,7 @@ ath_start(struct ifnet *ifp)
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ifp->if_oerrors++;
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reclaim:
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ATH_TXBUF_LOCK(sc);
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STAILQ_INSERT_HEAD(&sc->sc_txbuf, bf, bf_list);
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STAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
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ATH_TXBUF_UNLOCK(sc);
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if (ni != NULL)
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ieee80211_free_node(ni);
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@ -2415,7 +2411,7 @@ ath_descdma_setup(struct ath_softc *sc,
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__func__, dd->dd_name, ds, (u_long) dd->dd_desc_len,
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(caddr_t) dd->dd_desc_paddr, /*XXX*/ (u_long) dd->dd_desc_len);
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/* allocate buffers */
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/* allocate rx buffers */
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bsize = sizeof(struct ath_buf) * nbuf;
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bf = malloc(bsize, M_ATHDEV, M_NOWAIT | M_ZERO);
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if (bf == NULL) {
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@ -3691,7 +3687,7 @@ ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, struct ath_buf *bf
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, ctsrate /* rts/cts rate */
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, ctsduration /* rts/cts duration */
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);
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bf->bf_txflags = flags;
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bf->bf_flags = flags;
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/*
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* Setup the multi-rate retry state only when we're
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* going to use it. This assumes ath_hal_setuptxdesc
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@ -3762,7 +3758,7 @@ ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
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{
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struct ath_hal *ah = sc->sc_ah;
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struct ieee80211com *ic = &sc->sc_ic;
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struct ath_buf *bf, *last;
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struct ath_buf *bf;
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struct ath_desc *ds, *ds0;
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struct ieee80211_node *ni;
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struct ath_node *an;
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@ -3794,14 +3790,7 @@ ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
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break;
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}
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ATH_TXQ_REMOVE_HEAD(txq, bf_list);
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if (txq->axq_depth > 0) {
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/*
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* More frames follow. Mark the buffer busy
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* so it's not re-used while the hardware may
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* still re-read the link field.
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*/
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bf->bf_flags |= ATH_FLAG_BUSY;
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} else
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if (txq->axq_depth == 0)
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txq->axq_link = NULL;
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ATH_TXQ_UNLOCK(txq);
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@ -3838,7 +3827,7 @@ ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
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* Hand the descriptor to the rate control algorithm.
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*/
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if ((ds->ds_txstat.ts_status & HAL_TXERR_FILT) == 0 &&
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(bf->bf_txflags & HAL_TXDESC_NOACK) == 0) {
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(bf->bf_flags & HAL_TXDESC_NOACK) == 0) {
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/*
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* If frame was ack'd update the last rx time
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* used to workaround phantom bmiss interrupts.
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@ -3864,9 +3853,6 @@ ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
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bf->bf_node = NULL;
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ATH_TXBUF_LOCK(sc);
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last = STAILQ_LAST(&sc->sc_txbuf, ath_buf, bf_list);
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if (last != NULL)
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last->bf_flags &= ~ATH_FLAG_BUSY;
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STAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
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ATH_TXBUF_UNLOCK(sc);
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}
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@ -3982,18 +3968,17 @@ ath_tx_draintxq(struct ath_softc *sc, struct ath_txq *txq)
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/*
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* NB: this assumes output has been stopped and
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* we do not need to block ath_tx_proc
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* we do not need to block ath_tx_tasklet
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*/
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for (ix = 0;; ix++) {
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ATH_TXQ_LOCK(txq);
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bf = STAILQ_FIRST(&txq->axq_q);
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if (bf == NULL) {
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txq->axq_link = NULL;
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ATH_TXQ_UNLOCK(txq);
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break;
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}
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ATH_TXQ_REMOVE_HEAD(txq, bf_list);
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if (txq->axq_depth == 0)
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txq->axq_link = NULL;
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ATH_TXQ_UNLOCK(txq);
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#ifdef AR_DEBUG
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if (sc->sc_debug & ATH_DEBUG_RESET)
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@ -4011,16 +3996,10 @@ ath_tx_draintxq(struct ath_softc *sc, struct ath_txq *txq)
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*/
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ieee80211_free_node(ni);
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}
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bf->bf_flags &= ~ATH_FLAG_BUSY;
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ATH_TXBUF_LOCK(sc);
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STAILQ_INSERT_TAIL(&sc->sc_txbuf, bf, bf_list);
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ATH_TXBUF_UNLOCK(sc);
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}
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ATH_TXBUF_LOCK(sc);
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bf = STAILQ_FIRST(&sc->sc_txbuf);
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if (bf != NULL)
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bf->bf_flags &= ~ATH_FLAG_BUSY;
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ATH_TXBUF_UNLOCK(sc);
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}
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static void
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@ -4898,10 +4877,10 @@ ath_printtxbuf(struct ath_buf *bf, u_int qnum, u_int ix, int done)
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printf("Q%u[%3u]", qnum, ix);
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for (i = 0, ds = bf->bf_desc; i < bf->bf_nseg; i++, ds++) {
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printf(" (DS.V:%p DS.P:%p) L:%08x D:%08x F:%x TF:%04x%s\n"
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printf(" (DS.V:%p DS.P:%p) L:%08x D:%08x F:04%x%s\n"
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" %08x %08x %08x %08x %08x %08x\n",
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ds, (struct ath_desc *)bf->bf_daddr + i,
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ds->ds_link, ds->ds_data, bf->bf_flags, bf->bf_txflags,
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ds->ds_link, ds->ds_data, bf->bf_flags,
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!done ? "" : (ds->ds_txstat.ts_status == 0) ? " *" : " !",
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ds->ds_ctl0, ds->ds_ctl1,
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ds->ds_hw[0], ds->ds_hw[1], ds->ds_hw[2], ds->ds_hw[3]);
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@ -100,8 +100,7 @@ struct ath_node {
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struct ath_buf {
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STAILQ_ENTRY(ath_buf) bf_list;
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int bf_nseg;
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u_int16_t bf_txflags; /* tx descriptor flags */
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u_int16_t bf_flags; /* see below */
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int bf_flags; /* tx descriptor flags */
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struct ath_desc *bf_desc; /* virtual addr of desc */
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bus_addr_t bf_daddr; /* physical addr of desc */
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bus_dmamap_t bf_dmamap; /* DMA map for mbuf chain */
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@ -113,8 +112,6 @@ struct ath_buf {
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};
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typedef STAILQ_HEAD(, ath_buf) ath_bufhead;
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#define ATH_FLAG_BUSY 0x0001 /* tx descriptor owned by h/w */
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/*
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* DMA state for tx/rx descriptors.
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*/
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@ -140,7 +137,7 @@ struct ath_descdma {
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*/
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struct ath_txq {
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u_int axq_qnum; /* hardware q number */
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int axq_depth; /* queue depth (stat only) */
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u_int axq_depth; /* queue depth (stat only) */
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u_int axq_intrcnt; /* interrupt count */
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u_int32_t *axq_link; /* link ptr in last TX desc */
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STAILQ_HEAD(, ath_buf) axq_q; /* transmit queue */
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