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arm32: Align arguments of sync_icache() syscall to cacheline size.

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Otherwise, we may miss synchronization of the last cacheline.
MFC after:	3 days
This commit is contained in:
Michal Meloun 2021-02-09 11:36:36 +01:00
parent a26f735858
commit ec090f4a67
1 changed files with 3 additions and 6 deletions
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9
sys/arm/arm/sys_machdep.c
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@ -68,12 +68,9 @@ sync_icache(uintptr_t addr, size_t len)
size_t size; size_t size;
vm_offset_t rv; vm_offset_t rv;
/* /* Align starting address to cacheline size */
* Align starting address to even number because value of "1" len += addr & cpuinfo.dcache_line_mask;
* is used as return value for success. addr &= ~cpuinfo.dcache_line_mask;
*/
len += addr & 1;
addr &= ~1;
/* Break whole range to pages. */ /* Break whole range to pages. */
do { do {