Add some convenience functions for accessing device memory.
Add a DDB command to allow access to inb/inw/inl from the debugger.
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@ -23,7 +23,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: pcibus.c,v 1.1 1998/06/10 10:55:37 dfr Exp $
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* $Id: pcibus.c,v 1.2 1998/07/12 16:16:20 dfr Exp $
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*
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*/
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@ -36,6 +36,7 @@
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#include <pci/pcivar.h>
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#include <machine/chipset.h>
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#include <machine/cpuconf.h>
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static int cfgmech;
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static int devmax;
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@ -100,7 +101,8 @@ intr_create(void *dev_instance, int irq, inthand2_t handler, void *arg,
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device_t pcib = chipset.bridge;
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if (pcib)
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return BUS_CREATE_INTR(pcib, pcib,
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irq, (driver_intr_t*) handler, arg);
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0x900 + (irq << 4),
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(driver_intr_t*) handler, arg);
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else
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return 0;
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}
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@ -114,3 +116,87 @@ intr_connect(struct intrec *idesc)
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else
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return EINVAL;
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}
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void
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alpha_platform_assign_pciintr(pcicfgregs *cfg)
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{
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if(platform.pci_intr_map)
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platform.pci_intr_map((void *)cfg);
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}
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void
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memcpy_fromio(void *d, u_int32_t s, size_t size)
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{
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char *cp = d;
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while (size--)
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*cp++ = readb(s++);
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}
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void
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memcpy_toio(u_int32_t d, void *s, size_t size)
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{
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char *cp = s;
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while (size--)
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writeb(d++, *cp++);
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}
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void
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memset_io(u_int32_t d, int val, size_t size)
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{
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while (size--)
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writeb(d++, val);
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}
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#include "opt_ddb.h"
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#ifdef DDB
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#include <ddb/ddb.h>
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DB_COMMAND(in, db_in)
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{
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int c;
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int size;
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u_int32_t val;
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if (!have_addr)
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return;
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size = -1;
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while (c = *modif++) {
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switch (c) {
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case 'b':
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size = 1;
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break;
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case 'w':
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size = 2;
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break;
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case 'l':
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size = 4;
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break;
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}
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}
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if (size < 0) {
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db_printf("bad size\n");
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return;
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}
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if (count <= 0) count = 1;
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while (--count >= 0) {
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db_printf("%08x:\t", addr);
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switch (size) {
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case 1:
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db_printf("%02x\n", inb(addr));
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break;
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case 2:
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db_printf("%04x\n", inw(addr));
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break;
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case 4:
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db_printf("%08x\n", inl(addr));
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break;
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}
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}
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}
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#endif
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