bhyve: Address some signed/unsigned comparison warnings
MFC after: 1 week
This commit is contained in:
parent
cea34d0705
commit
ed72168431
@ -1330,8 +1330,8 @@ emulate_bextr(void *vm, int vcpuid, uint64_t gpa, struct vie *vie,
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mem_region_write_t memwrite __unused, void *arg)
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{
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uint64_t src1, src2, dst, rflags;
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unsigned start, len;
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int error, size;
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unsigned start, len, size;
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int error;
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size = vie->opsize;
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error = EINVAL;
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@ -372,7 +372,7 @@ calc_topology(void)
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(uintmax_t)ncpus);
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if (explicit_cpus) {
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if (guest_ncpus != ncpus)
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if (guest_ncpus != (int)ncpus)
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errx(4, "Topology (%d sockets, %d cores, %d threads) "
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"does not match %d vCPUs",
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cpu_sockets, cpu_cores, cpu_threads,
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@ -916,10 +916,10 @@ blockif_chs(struct blockif_ctxt *bc, uint16_t *c, uint8_t *h, uint8_t *s)
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sectors = bc->bc_size / bc->bc_sectsz;
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/* Clamp the size to the largest possible with CHS */
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if (sectors > 65535UL*16*255)
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sectors = 65535UL*16*255;
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if (sectors > 65535L * 16 * 255)
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sectors = 65535L * 16 * 255;
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if (sectors >= 65536UL*16*63) {
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if (sectors >= 65536L * 16 * 63) {
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secpt = 255;
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heads = 16;
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hcyl = sectors / secpt;
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@ -95,7 +95,7 @@ fwctl_send_rest(uint32_t *data, size_t len)
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uint32_t w;
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} u;
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uint8_t *cdata;
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int i;
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size_t i;
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cdata = (uint8_t *) data;
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u.w = 0;
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@ -427,7 +427,7 @@ fwctl_response(uint32_t *retval)
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remlen = rinfo.resp_size - rinfo.resp_off;
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dp = (uint32_t *)
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((uint8_t *)rinfo.resp_biov->iov_base + rinfo.resp_off);
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if (remlen >= sizeof(uint32_t)) {
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if (remlen >= (ssize_t)sizeof(uint32_t)) {
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*retval = *dp;
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} else if (remlen > 0) {
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*retval = fwctl_send_rest(dp, remlen);
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@ -958,7 +958,6 @@ static void
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gdb_read_regs(void)
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{
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uint64_t regvals[nitems(gdb_regset)];
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int i;
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if (vm_get_register_set(ctx, cur_vcpu, nitems(gdb_regset),
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gdb_regset, regvals) == -1) {
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@ -966,7 +965,7 @@ gdb_read_regs(void)
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return;
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}
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start_packet();
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for (i = 0; i < nitems(regvals); i++)
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for (size_t i = 0; i < nitems(regvals); i++)
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append_unsigned_native(regvals[i], gdb_regsize[i]);
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finish_packet();
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}
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@ -1706,13 +1705,16 @@ check_command(int fd)
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static void
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gdb_readable(int fd, enum ev_type event __unused, void *arg __unused)
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{
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size_t pending;
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ssize_t nread;
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int pending;
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int n;
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if (ioctl(fd, FIONREAD, &pending) == -1) {
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if (ioctl(fd, FIONREAD, &n) == -1) {
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warn("FIONREAD on GDB socket");
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return;
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}
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assert(n >= 0);
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pending = n;
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/*
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* 'pending' might be zero due to EOF. We need to call read
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@ -227,7 +227,7 @@ tap_init(struct net_backend *be, const char *devname,
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int opt = 1;
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#if defined(INET6) || defined(INET)
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struct ifreq ifrq;
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int i, s;
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int s;
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#endif
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#ifndef WITHOUT_CAPSICUM
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cap_rights_t rights;
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@ -268,7 +268,7 @@ tap_init(struct net_backend *be, const char *devname,
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}
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s = -1;
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for (i = 0; s == -1 && i < nitems(pf_list); i++)
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for (size_t i = 0; s == -1 && i < nitems(pf_list); i++)
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s = socket(pf_list[i], SOCK_DGRAM, 0);
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if (s == -1) {
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WPRINTF(("Could open socket"));
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@ -649,7 +649,7 @@ netmap_set_vnet_hdr_len(struct net_backend *be, int vnet_hdr_len)
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static int
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netmap_has_vnet_hdr_len(struct net_backend *be, unsigned vnet_hdr_len)
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{
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int prev_hdr_len = be->be_vnet_hdr_len;
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unsigned prev_hdr_len = be->be_vnet_hdr_len;
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int ret;
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if (vnet_hdr_len == prev_hdr_len) {
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@ -2442,7 +2442,7 @@ e82545_snapshot(struct vm_snapshot_meta *meta)
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true, meta, ret, done);
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/* L2 frame acceptance */
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for (i = 0; i < nitems(sc->esc_uni); i++) {
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for (i = 0; i < (int)nitems(sc->esc_uni); i++) {
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SNAPSHOT_VAR_OR_LEAVE(sc->esc_uni[i].eu_valid, meta, ret, done);
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SNAPSHOT_VAR_OR_LEAVE(sc->esc_uni[i].eu_addrsel, meta, ret, done);
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SNAPSHOT_VAR_OR_LEAVE(sc->esc_uni[i].eu_eth, meta, ret, done);
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@ -455,10 +455,13 @@ pci_emul_io_handler(struct vmctx *ctx, int vcpu, int in, int port, int bytes,
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uint64_t offset;
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int i;
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assert(port >= 0);
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for (i = 0; i <= PCI_BARMAX; i++) {
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if (pdi->pi_bar[i].type == PCIBAR_IO &&
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port >= pdi->pi_bar[i].addr &&
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port + bytes <= pdi->pi_bar[i].addr + pdi->pi_bar[i].size) {
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(uint64_t)port >= pdi->pi_bar[i].addr &&
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(uint64_t)port + bytes <=
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pdi->pi_bar[i].addr + pdi->pi_bar[i].size) {
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offset = port - pdi->pi_bar[i].addr;
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if (in)
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*eax = (*pe->pe_barread)(ctx, vcpu, pdi, i,
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@ -2298,7 +2301,7 @@ pci_snapshot_pci_dev(struct vm_snapshot_meta *meta)
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SNAPSHOT_BUF_OR_LEAVE(pi->pi_cfgdata, sizeof(pi->pi_cfgdata),
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meta, ret, done);
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for (i = 0; i < nitems(pi->pi_bar); i++) {
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for (i = 0; i < (int)nitems(pi->pi_bar); i++) {
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SNAPSHOT_VAR_OR_LEAVE(pi->pi_bar[i].type, meta, ret, done);
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SNAPSHOT_VAR_OR_LEAVE(pi->pi_bar[i].size, meta, ret, done);
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SNAPSHOT_VAR_OR_LEAVE(pi->pi_bar[i].addr, meta, ret, done);
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@ -615,7 +615,6 @@ hda_stream_start(struct hda_softc *sc, uint8_t stream_ind)
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uint32_t sdctl = 0;
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uint8_t strm = 0;
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uint8_t dir = 0;
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int i;
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assert(!st->run);
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@ -640,7 +639,7 @@ hda_stream_start(struct hda_softc *sc, uint8_t stream_ind)
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st->bdl_cnt = bdl_cnt;
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bdle = (struct hda_bdle *)bdl_vaddr;
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for (i = 0; i < bdl_cnt; i++, bdle++) {
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for (size_t i = 0; i < bdl_cnt; i++, bdle++) {
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bdle_sz = bdle->len;
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assert(!(bdle_sz % HDA_DMA_ACCESS_LEN));
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@ -659,7 +658,7 @@ hda_stream_start(struct hda_softc *sc, uint8_t stream_ind)
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bdle_desc->len = bdle_sz;
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bdle_desc->ioc = bdle->ioc;
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DPRINTF("bdle: 0x%x bdle_sz: 0x%x", i, bdle_sz);
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DPRINTF("bdle: 0x%zx bdle_sz: 0x%x", i, bdle_sz);
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}
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sdctl = hda_get_reg_by_offset(sc, off + HDAC_SDCTL0);
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@ -63,14 +63,16 @@ __FBSDID("$FreeBSD$");
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/* IRQ count to disable an IRQ. */
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#define IRQ_DISABLED 0xff
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#define NPIRQS 8
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static struct pirq {
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uint8_t reg;
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int use_count;
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int active_count;
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pthread_mutex_t lock;
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} pirqs[8];
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} pirqs[NPIRQS];
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static u_char irq_counts[16];
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#define NIRQ_COUNTS 16
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static u_char irq_counts[NIRQ_COUNTS];
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static int pirq_cold = 1;
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/*
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@ -91,7 +93,7 @@ uint8_t
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pirq_read(int pin)
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{
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assert(pin > 0 && pin <= nitems(pirqs));
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assert(pin > 0 && pin <= NPIRQS);
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return (pirqs[pin - 1].reg);
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}
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@ -100,7 +102,7 @@ pirq_write(struct vmctx *ctx, int pin, uint8_t val)
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{
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struct pirq *pirq;
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assert(pin > 0 && pin <= nitems(pirqs));
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assert(pin > 0 && pin <= NPIRQS);
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pirq = &pirqs[pin - 1];
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pthread_mutex_lock(&pirq->lock);
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if (pirq->reg != (val & (PIRQ_DIS | PIRQ_IRQ))) {
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@ -117,7 +119,7 @@ void
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pci_irq_reserve(int irq)
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{
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assert(irq >= 0 && irq < nitems(irq_counts));
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assert(irq >= 0 && irq < NIRQ_COUNTS);
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assert(pirq_cold);
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assert(irq_counts[irq] == 0 || irq_counts[irq] == IRQ_DISABLED);
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irq_counts[irq] = IRQ_DISABLED;
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@ -127,7 +129,7 @@ void
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pci_irq_use(int irq)
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{
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assert(irq >= 0 && irq < nitems(irq_counts));
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assert(irq >= 0 && irq < NIRQ_COUNTS);
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assert(pirq_cold);
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assert(irq_counts[irq] != IRQ_DISABLED);
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irq_counts[irq]++;
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@ -138,13 +140,13 @@ pci_irq_init(struct vmctx *ctx __unused)
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{
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int i;
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for (i = 0; i < nitems(pirqs); i++) {
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for (i = 0; i < NPIRQS; i++) {
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pirqs[i].reg = PIRQ_DIS;
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pirqs[i].use_count = 0;
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pirqs[i].active_count = 0;
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pthread_mutex_init(&pirqs[i].lock, NULL);
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}
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for (i = 0; i < nitems(irq_counts); i++) {
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for (i = 0; i < NIRQ_COUNTS; i++) {
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if (IRQ_PERMITTED(i))
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irq_counts[i] = 0;
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else
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@ -156,10 +158,12 @@ void
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pci_irq_assert(struct pci_devinst *pi)
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{
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struct pirq *pirq;
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int pin;
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if (pi->pi_lintr.pirq_pin > 0) {
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assert(pi->pi_lintr.pirq_pin <= nitems(pirqs));
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pirq = &pirqs[pi->pi_lintr.pirq_pin - 1];
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pin = pi->pi_lintr.pirq_pin;
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if (pin > 0) {
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assert(pin <= NPIRQS);
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pirq = &pirqs[pin - 1];
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pthread_mutex_lock(&pirq->lock);
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pirq->active_count++;
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if (pirq->active_count == 1 && pirq_valid_irq(pirq->reg)) {
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@ -177,10 +181,12 @@ void
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pci_irq_deassert(struct pci_devinst *pi)
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{
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struct pirq *pirq;
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int pin;
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if (pi->pi_lintr.pirq_pin > 0) {
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assert(pi->pi_lintr.pirq_pin <= nitems(pirqs));
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pirq = &pirqs[pi->pi_lintr.pirq_pin - 1];
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pin = pi->pi_lintr.pirq_pin;
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if (pin > 0) {
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assert(pin <= NPIRQS);
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pirq = &pirqs[pin - 1];
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pthread_mutex_lock(&pirq->lock);
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pirq->active_count--;
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if (pirq->active_count == 0 && pirq_valid_irq(pirq->reg)) {
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@ -209,7 +215,7 @@ pirq_alloc_pin(struct pci_devinst *pi)
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/* Find the least-used PIRQ pin. */
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best_pin = 0;
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best_count = pirqs[0].use_count;
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for (pin = 1; pin < nitems(pirqs); pin++) {
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for (pin = 1; pin < NPIRQS; pin++) {
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if (pirqs[pin].use_count < best_count) {
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best_pin = pin;
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best_count = pirqs[pin].use_count;
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@ -222,7 +228,7 @@ pirq_alloc_pin(struct pci_devinst *pi)
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if (pirqs[best_pin].reg == PIRQ_DIS) {
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best_irq = -1;
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best_count = 0;
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for (irq = 0; irq < nitems(irq_counts); irq++) {
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for (irq = 0; irq < NIRQ_COUNTS; irq++) {
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if (irq_counts[irq] == IRQ_DISABLED)
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continue;
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if (best_irq == -1 || irq_counts[irq] < best_count) {
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@ -242,7 +248,7 @@ pirq_alloc_pin(struct pci_devinst *pi)
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int
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pirq_irq(int pin)
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{
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assert(pin > 0 && pin <= nitems(pirqs));
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assert(pin > 0 && pin <= NPIRQS);
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return (pirqs[pin - 1].reg & PIRQ_IRQ);
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}
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@ -255,7 +261,7 @@ pirq_dsdt(void)
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int irq, pin;
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irq_prs = NULL;
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for (irq = 0; irq < nitems(irq_counts); irq++) {
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for (irq = 0; irq < NIRQ_COUNTS; irq++) {
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if (!IRQ_PERMITTED(irq))
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continue;
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if (irq_prs == NULL)
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@ -294,7 +300,7 @@ pirq_dsdt(void)
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dsdt_line(" Return (0x01)");
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dsdt_line("}");
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for (pin = 0; pin < nitems(pirqs); pin++) {
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for (pin = 0; pin < NPIRQS; pin++) {
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dsdt_line("");
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dsdt_line("Device (LNK%c)", 'A' + pin);
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dsdt_line("{");
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@ -3272,7 +3272,7 @@ pci_nvme_init(struct vmctx *ctx __unused, struct pci_devinst *pi, nvlist_t *nvl)
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STAILQ_INIT(&sc->ioreqs_free);
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sc->ioreqs = calloc(sc->ioslots, sizeof(struct pci_nvme_ioreq));
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for (int i = 0; i < sc->ioslots; i++) {
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for (uint32_t i = 0; i < sc->ioslots; i++) {
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STAILQ_INSERT_TAIL(&sc->ioreqs_free, &sc->ioreqs[i], link);
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}
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@ -183,7 +183,7 @@ write_config(const struct pcisel *sel, long reg, int width, uint32_t data)
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static int
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passthru_add_msicap(struct pci_devinst *pi, int msgnum, int nextptr)
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{
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int capoff, i;
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int capoff;
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struct msicap msicap;
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u_char *capdata;
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@ -197,7 +197,7 @@ passthru_add_msicap(struct pci_devinst *pi, int msgnum, int nextptr)
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*/
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capoff = 256 - roundup(sizeof(msicap), 4);
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capdata = (u_char *)&msicap;
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for (i = 0; i < sizeof(msicap); i++)
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for (size_t i = 0; i < sizeof(msicap); i++)
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pci_set_cfgdata8(pi, capoff + i, capdata[i]);
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return (capoff);
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@ -421,7 +421,7 @@ pci_vtinput_cfgread(void *vsc, int offset, int size, uint32_t *retval)
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struct pci_vtinput_softc *sc = vsc;
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/* check for valid offset and size */
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if (offset + size > sizeof(struct vtinput_config)) {
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if (offset + size > (int)sizeof(struct vtinput_config)) {
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WPRINTF(("%s: read to invalid offset/size %d/%d", __func__,
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offset, size));
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memset(retval, 0, size);
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@ -650,8 +650,7 @@ pci_xhci_init_ep(struct pci_xhci_dev_emu *dev, int epid)
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struct xhci_dev_ctx *dev_ctx;
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struct pci_xhci_dev_ep *devep;
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struct xhci_endp_ctx *ep_ctx;
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uint32_t pstreams;
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int i;
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uint32_t i, pstreams;
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dev_ctx = dev->dev_ctx;
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ep_ctx = &dev_ctx->ctx_ep[epid];
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@ -2107,7 +2106,7 @@ pci_xhci_rtsregs_write(struct pci_xhci_softc *sc, uint64_t offset,
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if (rts->er_events_cnt > 0) {
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uint64_t erdp;
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uint32_t erdp_i;
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int erdp_i;
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erdp = rts->intrreg.erdp & ~0xF;
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erdp_i = (erdp - rts->erstba_p->qwEvrsTablePtr) /
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@ -450,7 +450,8 @@ lookup_struct(enum snapshot_req struct_id, struct restore_state *rstate,
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JSON_GET_INT_OR_RETURN(JSON_FILE_OFFSET_KEY, obj,
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&file_offset, NULL);
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assert(file_offset >= 0);
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assert(file_offset + size <= rstate->kdata_len);
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assert((uint64_t)file_offset + size <=
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rstate->kdata_len);
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*struct_size = (size_t)size;
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return ((uint8_t *)rstate->kdata_map + file_offset);
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@ -479,7 +480,7 @@ lookup_check_dev(const char *dev_name, struct restore_state *rstate,
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JSON_GET_INT_OR_RETURN(JSON_FILE_OFFSET_KEY, obj,
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&file_offset, NULL);
|
||||
assert(file_offset >= 0);
|
||||
assert(file_offset + size <= rstate->kdata_len);
|
||||
assert((uint64_t)file_offset + size <= rstate->kdata_len);
|
||||
|
||||
*data_size = (size_t)size;
|
||||
return ((uint8_t *)rstate->kdata_map + file_offset);
|
||||
@ -1046,8 +1047,9 @@ vm_snapshot_kern_struct(int data_fd, xo_handle_t *xop, const char *array_key,
|
||||
|
||||
data_size = vm_get_snapshot_size(meta);
|
||||
|
||||
/* XXX-MJ no handling for short writes. */
|
||||
write_cnt = write(data_fd, meta->buffer.buf_start, data_size);
|
||||
if (write_cnt != data_size) {
|
||||
if (write_cnt < 0 || (size_t)write_cnt != data_size) {
|
||||
perror("Failed to write all snapshotted data.");
|
||||
ret = -1;
|
||||
goto done;
|
||||
@ -1138,13 +1140,14 @@ static int
|
||||
vm_snapshot_dev_write_data(int data_fd, xo_handle_t *xop, const char *array_key,
|
||||
struct vm_snapshot_meta *meta, off_t *offset)
|
||||
{
|
||||
int ret;
|
||||
ssize_t ret;
|
||||
size_t data_size;
|
||||
|
||||
data_size = vm_get_snapshot_size(meta);
|
||||
|
||||
/* XXX-MJ no handling for short writes. */
|
||||
ret = write(data_fd, meta->buffer.buf_start, data_size);
|
||||
if (ret != data_size) {
|
||||
if (ret < 0 || (size_t)ret != data_size) {
|
||||
perror("Failed to write all snapshotted data.");
|
||||
return (-1);
|
||||
}
|
||||
|
@ -774,7 +774,7 @@ vmexit_task_switch(struct vmctx *ctx, struct vm_exit *vmexit, int *pvcpu)
|
||||
minlimit = 0;
|
||||
|
||||
assert(minlimit > 0);
|
||||
if (nt.limit < minlimit) {
|
||||
if (nt.limit < (unsigned int)minlimit) {
|
||||
sel_exception(ctx, vcpu, IDT_TS, nt_sel, ext);
|
||||
goto done;
|
||||
}
|
||||
|
@ -616,7 +616,7 @@ int
|
||||
uart_legacy_alloc(int which, int *baseaddr, int *irq)
|
||||
{
|
||||
|
||||
if (which < 0 || which >= UART_NLDEVS || uart_lres[which].inuse)
|
||||
if (which < 0 || which >= (int)UART_NLDEVS || uart_lres[which].inuse)
|
||||
return (-1);
|
||||
|
||||
uart_lres[which].inuse = true;
|
||||
|
@ -773,7 +773,7 @@ vi_pci_write(struct vmctx *ctx __unused, int vcpu __unused,
|
||||
vs->vs_curq = value;
|
||||
break;
|
||||
case VIRTIO_PCI_QUEUE_NOTIFY:
|
||||
if (value >= vc->vc_nvq) {
|
||||
if (value >= (unsigned int)vc->vc_nvq) {
|
||||
EPRINTLN("%s: queue %d notify out of range",
|
||||
name, (int)value);
|
||||
goto done;
|
||||
|
Loading…
Reference in New Issue
Block a user