MFi386: fix up CR0 settings
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@ -558,27 +558,8 @@ exec_setregs(td, entry, stack, ps_strings)
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}
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/*
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* Arrange to trap the next fpu or `fwait' instruction (see fpu.c
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* for why fwait must be trapped at least if there is an fpu or an
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* emulator). This is mainly to handle the case where npx0 is not
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* configured, since the fpu routines normally set up the trap
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* otherwise. It should be done only at boot time, but doing it
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* here allows modifying `fpu_exists' for testing the emulator on
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* systems with an fpu.
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*/
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load_cr0(rcr0() | CR0_MP | CR0_TS);
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/* Initialize the fpu (if any) for the current process. */
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/*
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* XXX the above load_cr0() also initializes it and is a layering
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* violation. It drops the fpu state partially
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* and this would be fatal if we were interrupted now, and decided
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* to force the state to the pcb, and checked the invariant
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* (CR0_TS clear) if and only if PCPU_GET(fpcurthread) != NULL).
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* ALL of this can happen except the check. The check used to
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* happen and be fatal later when we didn't complete the drop
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* before returning to user mode. This should be fixed properly
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* soon.
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* Drop the FP state if we hold it, so that the process gets a
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* clean FP state if it uses the FPU again.
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*/
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fpstate_drop(td);
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}
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@ -589,8 +570,11 @@ cpu_setregs(void)
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register_t cr0;
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cr0 = rcr0();
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cr0 |= CR0_NE; /* Done by fpuinit() */
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cr0 |= CR0_MP | CR0_TS; /* Done at every execve() too. */
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/*
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* CR0_MP, CR0_NE and CR0_TS are also set by npx_probe() for the
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* BSP. See the comments there about why we set them.
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*/
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cr0 |= CR0_MP | CR0_NE | CR0_TS;
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cr0 |= CR0_WP | CR0_AM;
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load_cr0(cr0);
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}
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