From f0ba8e211c5683bfa417254b105173ebaa2e78fb Mon Sep 17 00:00:00 2001 From: Mike Smith Date: Thu, 18 May 2000 00:06:10 +0000 Subject: [PATCH] Implement real read/write barriers for the i386. Despite the comment in previous versions of this file, some barrier functionality is required. --- sys/amd64/include/bus_amd64.h | 19 +++++++++++++++---- sys/amd64/include/bus_at386.h | 19 +++++++++++++++---- sys/amd64/include/bus_dma.h | 19 +++++++++++++++---- sys/i386/include/bus_at386.h | 19 +++++++++++++++---- sys/i386/include/bus_dma.h | 19 +++++++++++++++---- sys/sys/bus_dma.h | 19 +++++++++++++++---- 6 files changed, 90 insertions(+), 24 deletions(-) diff --git a/sys/amd64/include/bus_amd64.h b/sys/amd64/include/bus_amd64.h index 2dc6ecbe02f7..601e2b4ed062 100644 --- a/sys/amd64/include/bus_amd64.h +++ b/sys/amd64/include/bus_amd64.h @@ -1134,14 +1134,25 @@ bus_space_copy_region_4(bus_space_tag_t tag, bus_space_handle_t bsh1, * void bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, * bus_size_t offset, bus_size_t len, int flags); * - * Note: the i386 does not currently require barriers, but we must - * provide the flags to MI code. + * + * Note that BUS_SPACE_BARRIER_WRITE doesn't do anything other than + * prevent reordering by the compiler; all Intel x86 processors currently + * retire operations outside the CPU in program order. */ -#define bus_space_barrier(t, h, o, l, f) \ - ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f))) #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ +static __inline void +bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, + bus_size_t offset, bus_size_t len, int flags) +{ + if (flags & BUS_SPACE_BARRIER_READ) + __asm __volatile ("lock; addl $0,0(%esp)" : : : "memory"); + else + __asm __volatile ("" : : : "memory"); +} + + /* * Flags used in various bus DMA methods. */ diff --git a/sys/amd64/include/bus_at386.h b/sys/amd64/include/bus_at386.h index 2dc6ecbe02f7..601e2b4ed062 100644 --- a/sys/amd64/include/bus_at386.h +++ b/sys/amd64/include/bus_at386.h @@ -1134,14 +1134,25 @@ bus_space_copy_region_4(bus_space_tag_t tag, bus_space_handle_t bsh1, * void bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, * bus_size_t offset, bus_size_t len, int flags); * - * Note: the i386 does not currently require barriers, but we must - * provide the flags to MI code. + * + * Note that BUS_SPACE_BARRIER_WRITE doesn't do anything other than + * prevent reordering by the compiler; all Intel x86 processors currently + * retire operations outside the CPU in program order. */ -#define bus_space_barrier(t, h, o, l, f) \ - ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f))) #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ +static __inline void +bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, + bus_size_t offset, bus_size_t len, int flags) +{ + if (flags & BUS_SPACE_BARRIER_READ) + __asm __volatile ("lock; addl $0,0(%esp)" : : : "memory"); + else + __asm __volatile ("" : : : "memory"); +} + + /* * Flags used in various bus DMA methods. */ diff --git a/sys/amd64/include/bus_dma.h b/sys/amd64/include/bus_dma.h index 2dc6ecbe02f7..601e2b4ed062 100644 --- a/sys/amd64/include/bus_dma.h +++ b/sys/amd64/include/bus_dma.h @@ -1134,14 +1134,25 @@ bus_space_copy_region_4(bus_space_tag_t tag, bus_space_handle_t bsh1, * void bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, * bus_size_t offset, bus_size_t len, int flags); * - * Note: the i386 does not currently require barriers, but we must - * provide the flags to MI code. + * + * Note that BUS_SPACE_BARRIER_WRITE doesn't do anything other than + * prevent reordering by the compiler; all Intel x86 processors currently + * retire operations outside the CPU in program order. */ -#define bus_space_barrier(t, h, o, l, f) \ - ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f))) #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ +static __inline void +bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, + bus_size_t offset, bus_size_t len, int flags) +{ + if (flags & BUS_SPACE_BARRIER_READ) + __asm __volatile ("lock; addl $0,0(%esp)" : : : "memory"); + else + __asm __volatile ("" : : : "memory"); +} + + /* * Flags used in various bus DMA methods. */ diff --git a/sys/i386/include/bus_at386.h b/sys/i386/include/bus_at386.h index 2dc6ecbe02f7..601e2b4ed062 100644 --- a/sys/i386/include/bus_at386.h +++ b/sys/i386/include/bus_at386.h @@ -1134,14 +1134,25 @@ bus_space_copy_region_4(bus_space_tag_t tag, bus_space_handle_t bsh1, * void bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, * bus_size_t offset, bus_size_t len, int flags); * - * Note: the i386 does not currently require barriers, but we must - * provide the flags to MI code. + * + * Note that BUS_SPACE_BARRIER_WRITE doesn't do anything other than + * prevent reordering by the compiler; all Intel x86 processors currently + * retire operations outside the CPU in program order. */ -#define bus_space_barrier(t, h, o, l, f) \ - ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f))) #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ +static __inline void +bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, + bus_size_t offset, bus_size_t len, int flags) +{ + if (flags & BUS_SPACE_BARRIER_READ) + __asm __volatile ("lock; addl $0,0(%esp)" : : : "memory"); + else + __asm __volatile ("" : : : "memory"); +} + + /* * Flags used in various bus DMA methods. */ diff --git a/sys/i386/include/bus_dma.h b/sys/i386/include/bus_dma.h index 2dc6ecbe02f7..601e2b4ed062 100644 --- a/sys/i386/include/bus_dma.h +++ b/sys/i386/include/bus_dma.h @@ -1134,14 +1134,25 @@ bus_space_copy_region_4(bus_space_tag_t tag, bus_space_handle_t bsh1, * void bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, * bus_size_t offset, bus_size_t len, int flags); * - * Note: the i386 does not currently require barriers, but we must - * provide the flags to MI code. + * + * Note that BUS_SPACE_BARRIER_WRITE doesn't do anything other than + * prevent reordering by the compiler; all Intel x86 processors currently + * retire operations outside the CPU in program order. */ -#define bus_space_barrier(t, h, o, l, f) \ - ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f))) #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ +static __inline void +bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, + bus_size_t offset, bus_size_t len, int flags) +{ + if (flags & BUS_SPACE_BARRIER_READ) + __asm __volatile ("lock; addl $0,0(%esp)" : : : "memory"); + else + __asm __volatile ("" : : : "memory"); +} + + /* * Flags used in various bus DMA methods. */ diff --git a/sys/sys/bus_dma.h b/sys/sys/bus_dma.h index 2dc6ecbe02f7..601e2b4ed062 100644 --- a/sys/sys/bus_dma.h +++ b/sys/sys/bus_dma.h @@ -1134,14 +1134,25 @@ bus_space_copy_region_4(bus_space_tag_t tag, bus_space_handle_t bsh1, * void bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, * bus_size_t offset, bus_size_t len, int flags); * - * Note: the i386 does not currently require barriers, but we must - * provide the flags to MI code. + * + * Note that BUS_SPACE_BARRIER_WRITE doesn't do anything other than + * prevent reordering by the compiler; all Intel x86 processors currently + * retire operations outside the CPU in program order. */ -#define bus_space_barrier(t, h, o, l, f) \ - ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f))) #define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */ #define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */ +static __inline void +bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh, + bus_size_t offset, bus_size_t len, int flags) +{ + if (flags & BUS_SPACE_BARRIER_READ) + __asm __volatile ("lock; addl $0,0(%esp)" : : : "memory"); + else + __asm __volatile ("" : : : "memory"); +} + + /* * Flags used in various bus DMA methods. */