Make it possible to access the ocotp registers before the ocotp device
is attached, by establishing a temporary mapping of the registers when necessary. This is a temporary measure to keep progress moving; in the long run we need better control over the order in which devices attach (better than "the order they appear in the fdt dts source").
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@ -46,6 +46,48 @@ __FBSDID("$FreeBSD$");
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#include <arm/freescale/fsl_ocotpreg.h>
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#include <arm/freescale/fsl_ocotpvar.h>
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/*
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* Find the physical address and size of the ocotp registers and devmap them,
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* returning a pointer to the virtual address of the base.
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*
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* XXX This is temporary until we've worked out all the details of controlling
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* the load order of devices. In an ideal world this device would be up and
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* running before anything that needs it. When we're at a point to make that
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* happen, this little block of code, and the few lines in fsl_ocotp_read_4()
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* that refer to it can be deleted.
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*/
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <dev/fdt/fdt_common.h>
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#include <machine/devmap.h>
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static uint32_t *ocotp_regs;
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static vm_size_t ocotp_size;
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static void
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fsl_ocotp_devmap(void)
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{
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phandle_t child, root;
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u_long base, size;
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if ((root = OF_finddevice("/")) == 0)
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goto fatal;
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if ((child = fdt_depth_search_compatible(root, "fsl,imx6q-ocotp", 0)) == 0)
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goto fatal;
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if (fdt_regsize(child, &base, &size) != 0)
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goto fatal;
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ocotp_size = (vm_size_t)size;
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if ((ocotp_regs = pmap_mapdev((vm_offset_t)base, ocotp_size)) == NULL)
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goto fatal;
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return;
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fatal:
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panic("cannot find/map the ocotp registers, %d", where);
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}
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/* XXX end of temporary code */
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struct ocotp_softc {
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device_t dev;
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struct resource *mem_res;
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@ -60,20 +102,12 @@ RD4(struct ocotp_softc *sc, bus_size_t off)
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return (bus_read_4(sc->mem_res, off));
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}
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static int
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ocotp_detach(device_t dev)
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{
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struct ocotp_softc *sc;
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sc = device_get_softc(dev);
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if (sc->mem_res != NULL)
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bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mem_res);
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ocotp_sc = NULL;
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return (0);
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/* The ocotp registers are always accessible. */
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return (EBUSY);
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}
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static int
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@ -96,6 +130,11 @@ ocotp_attach(device_t dev)
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}
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ocotp_sc = sc;
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/* We're done with the temporary mapping now. */
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if (ocotp_regs != NULL)
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pmap_unmapdev((vm_offset_t)ocotp_regs, ocotp_size);
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err = 0;
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out:
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@ -112,7 +151,7 @@ ocotp_probe(device_t dev)
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_is_compatible(dev, "fsl,imx6q-ocotp") == 0)
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if (ofw_bus_is_compatible(dev, "fsl,imx6q-ocotp") == 0)
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return (ENXIO);
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device_set_desc(dev,
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@ -125,13 +164,23 @@ uint32_t
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fsl_ocotp_read_4(bus_size_t off)
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{
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if (ocotp_sc == NULL)
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panic("fsl_ocotp_read_4: softc not set!");
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if (off > FSL_OCOTP_LAST_REG)
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panic("fsl_ocotp_read_4: offset out of range");
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return (RD4(ocotp_sc, off));
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/* If we have a softcontext use the regular bus_space read. */
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if (ocotp_sc != NULL)
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return (RD4(ocotp_sc, off));
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/*
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* Otherwise establish a tempory device mapping if necessary, and read
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* the device without any help from bus_space.
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*
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* XXX Eventually the code from there down can be deleted.
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*/
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if (ocotp_regs == NULL)
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fsl_ocotp_devmap();
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return (ocotp_regs[off / 4]);
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}
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static device_method_t ocotp_methods[] = {
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@ -48,6 +48,13 @@
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#define FSL_OCOTP_CFG1 0x420
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#define FSL_OCOTP_CFG2 0x430
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#define FSL_OCOTP_CFG3 0x440
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#define FSL_OCOTP_CFG3_SPEED_SHIFT 16
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#define FSL_OCOTP_CFG3_SPEED_MASK \
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(0x03 << FSL_OCOTP_CFG3_SPEED_SHIFT)
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#define FSL_OCOTP_CFG3_SPEED_792MHZ 0
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#define FSL_OCOTP_CFG3_SPEED_852MHZ 1
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#define FSL_OCOTP_CFG3_SPEED_996MHZ 2
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#define FSL_OCOTP_CFG3_SPEED_1200MHZ 3
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#define FSL_OCOTP_CFG4 0x450
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#define FSL_OCOTP_CFG5 0x460
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#define FSL_OCOTP_CFG6 0x470
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