Minor tweaks in the names to match the chips more closely.
This commit is contained in:
parent
06f535757c
commit
f43675aea8
@ -29,15 +29,15 @@
|
||||
|
||||
/* Dlink chipset used on some Netgear and Dlink PCMCIA cards */
|
||||
#define ED_DL100XX_MIIBUS 0x0c /* MII bus register on ASIC */
|
||||
#define ED_DL100XX_DIAG 0x0d
|
||||
#define ED_DL100XX_COLLISON_DIS 4 /* Disable collision detection */
|
||||
#define ED_DL10022_DIAG 0x0d
|
||||
#define ED_DL10022_COLLISON_DIS 4 /* Disable collision detection */
|
||||
|
||||
#define ED_DL100XX_MII_RESET1 0x04
|
||||
#define ED_DL100XX_MII_RESET2 0x08
|
||||
#define ED_DL10022_MII_RESET1 0x04
|
||||
#define ED_DL10022_MII_RESET2 0x08
|
||||
|
||||
#define ED_DL100XX_MII_DATAIN 0x10
|
||||
#define ED_DL100XX_MII_DIROUT_22 0x20
|
||||
#define ED_DL100XX_MII_DIROUT_19 0x10
|
||||
#define ED_DL100XX_MII_DIROUT 0x30
|
||||
#define ED_DL10022_MII_DIROUT 0x20
|
||||
#define ED_DL10019_MII_DIROUT 0x10
|
||||
#define ED_DL100XX_MII_DIROUT (ED_DL10022_MII_DIROUT | ED_DL10019_MII_DIROUT)
|
||||
#define ED_DL100XX_MII_DATAOUT 0x40
|
||||
#define ED_DL100XX_MII_CLK 0x80
|
||||
|
@ -439,9 +439,9 @@ ed_pccard_tick(void *arg)
|
||||
if (mii->mii_media_status & IFM_ACTIVE &&
|
||||
media != mii->mii_media_status && 0 &&
|
||||
sc->chip_type == ED_CHIP_TYPE_DL10022) {
|
||||
ed_asic_outb(sc, ED_DL100XX_DIAG,
|
||||
ed_asic_outb(sc, ED_DL10022_DIAG,
|
||||
(mii->mii_media_active & IFM_FDX) ?
|
||||
ED_DL100XX_COLLISON_DIS : 0);
|
||||
ED_DL10022_COLLISON_DIS : 0);
|
||||
}
|
||||
|
||||
}
|
||||
@ -683,15 +683,15 @@ ed_pccard_dl100xx_mii_reset(struct ed_softc *sc)
|
||||
if (sc->chip_type != ED_CHIP_TYPE_DL10022)
|
||||
return;
|
||||
|
||||
ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL100XX_MII_RESET2);
|
||||
ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL10022_MII_RESET2);
|
||||
DELAY(10);
|
||||
ed_asic_outb(sc, ED_DL100XX_MIIBUS,
|
||||
ED_DL100XX_MII_RESET2 | ED_DL100XX_MII_RESET1);
|
||||
ED_DL10022_MII_RESET2 | ED_DL10022_MII_RESET1);
|
||||
DELAY(10);
|
||||
ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL100XX_MII_RESET2);
|
||||
ed_asic_outb(sc, ED_DL100XX_MIIBUS, ED_DL10022_MII_RESET2);
|
||||
DELAY(10);
|
||||
ed_asic_outb(sc, ED_DL100XX_MIIBUS,
|
||||
ED_DL100XX_MII_RESET2 | ED_DL100XX_MII_RESET1);
|
||||
ED_DL10022_MII_RESET2 | ED_DL10022_MII_RESET1);
|
||||
DELAY(10);
|
||||
ed_asic_outb(sc, ED_DL100XX_MIIBUS, 0);
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user