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[bwn] always allocate maximum size txhdr entries; prepare for fw 598

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* always allocate maximum size txhdr entries
* set the right rx header offset/framesize based on firmware

This still isn't what's completely required for fw 598 support; there's
more to come.

Tested:

* Apple BCM94321MC 11abgn NIC, 11a STA mode, firmware version 4xx.

Obtained from:	DragonflyBSD (txhdr entry sizing), fw 598 RX header size (linux b43)
This commit is contained in:
Adrian Chadd 2016-05-17 20:18:23 +00:00
parent 07454911f0
commit f629a23855
3 changed files with 23 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
sys/dev/bwn/if_bwn.c
View File

@ -2656,8 +2656,21 @@ bwn_dma_ringsetup(struct bwn_mac *mac, int controller_index,
dr->dr_curslot = -1;
} else {
if (dr->dr_index == 0) {
dr->dr_rx_bufsize = BWN_DMA0_RX_BUFFERSIZE;
dr->dr_frameoffset = BWN_DMA0_RX_FRAMEOFFSET;
switch (mac->mac_fw.fw_hdr_format) {
case BWN_FW_HDR_351:
case BWN_FW_HDR_410:
dr->dr_rx_bufsize =
BWN_DMA0_RX_BUFFERSIZE_FW351;
dr->dr_frameoffset =
BWN_DMA0_RX_FRAMEOFFSET_FW351;
break;
case BWN_FW_HDR_598:
dr->dr_rx_bufsize =
BWN_DMA0_RX_BUFFERSIZE_FW598;
dr->dr_frameoffset =
BWN_DMA0_RX_FRAMEOFFSET_FW598;
break;
}
} else
KASSERT(0 == 1, ("%s:%d: fail", __func__, __LINE__));
}
@ -2676,7 +2689,7 @@ bwn_dma_ringsetup(struct bwn_mac *mac, int controller_index,
dr->dr_txhdr_cache = contigmalloc(
(dr->dr_numslots / BWN_TX_SLOTS_PER_FRAME) *
BWN_HDRSIZE(mac), M_DEVBUF, M_ZERO,
BWN_MAXTXHDRSIZE, M_DEVBUF, M_ZERO,
0, BUS_SPACE_MAXADDR, 8, 0);
if (dr->dr_txhdr_cache == NULL) {
device_printf(sc->sc_dev,
@ -2773,7 +2786,7 @@ bwn_dma_ringsetup(struct bwn_mac *mac, int controller_index,
if (dr->dr_txhdr_cache != NULL) {
contigfree(dr->dr_txhdr_cache,
(dr->dr_numslots / BWN_TX_SLOTS_PER_FRAME) *
BWN_HDRSIZE(mac), M_DEVBUF);
BWN_MAXTXHDRSIZE, M_DEVBUF);
}
fail1:
free(dr->dr_meta, M_DEVBUF);
@ -2795,7 +2808,7 @@ bwn_dma_ringfree(struct bwn_dma_ring **dr)
if ((*dr)->dr_txhdr_cache != NULL) {
contigfree((*dr)->dr_txhdr_cache,
((*dr)->dr_numslots / BWN_TX_SLOTS_PER_FRAME) *
BWN_HDRSIZE((*dr)->dr_mac), M_DEVBUF);
BWN_MAXTXHDRSIZE, M_DEVBUF);
}
free((*dr)->dr_meta, M_DEVBUF);
free(*dr, M_DEVBUF);

6
sys/dev/bwn/if_bwnreg.h
View File

@ -453,11 +453,13 @@
#define BWN_DMA64_RXSTAT 0xf0000000
#define BWN_DMA64_RXSTAT_DISABLED 0x00000000
#define BWN_DMA_RINGMEMSIZE PAGE_SIZE
#define BWN_DMA0_RX_FRAMEOFFSET 30
#define BWN_DMA0_RX_FRAMEOFFSET_FW351 30
#define BWN_DMA0_RX_FRAMEOFFSET_FW598 38
#define BWN_TXRING_SLOTS 64
#define BWN_RXRING_SLOTS 64
#define BWN_DMA0_RX_BUFFERSIZE IEEE80211_MAX_LEN
#define BWN_DMA0_RX_BUFFERSIZE_FW351 (IEEE80211_MAX_LEN + BWN_DMA0_RX_FRAMEOFFSET_FW351)
#define BWN_DMA0_RX_BUFFERSIZE_FW598 (IEEE80211_MAX_LEN + BWN_DMA0_RX_FRAMEOFFSET_FW598)
#define BWN_PHYROUTE_BASE 0x0000
#define BWN_PHYROUTE_MASK 0x0c00

1
sys/dev/bwn/if_bwnvar.h
View File

@ -59,6 +59,7 @@ struct bwn_mac;
#define BWN_TSSI2DBM(num, den) \
((int32_t)((num < 0) ? num / den : (num + den / 2) / den))
#define BWN_HDRSIZE(mac) bwn_tx_hdrsize(mac)
#define BWN_MAXTXHDRSIZE (112 + (sizeof(struct bwn_plcp6)))
#define BWN_PIO_COOKIE(tq, tp) \
((uint16_t)((((uint16_t)tq->tq_index + 1) << 12) | tp->tp_index))