e1000: fix timeout for shadow RAM write
This fixes the timed out for shadow RAM write EEWR can't be detected. Fixes: 5a32a257f957 ("e1000: more NICs in base driver") Cc: stable@dpdk.org Signed-off-by: Chengwen Feng <fengchengwen@huawei.com> Signed-off-by: Min Hu (Connor) <humin29@huawei.com> Acked-by: Haiyue Wang <haiyue.wang@intel.com> Approved by: imp Obtained from: DPDK (4a8ab48ec47b3616272e50620b8e1a9599358ea6) MFC after: 1 week
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@ -195,6 +195,8 @@ static s32 e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
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}
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for (i = 0; i < words; i++) {
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ret_val = -E1000_ERR_NVM;
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eewr = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) |
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(data[i] << E1000_NVM_RW_REG_DATA) |
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E1000_NVM_RW_REG_START;
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