Rename a bit to make it clearer that it enables routing of the function
interrupts to the ISA bus.
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@ -446,7 +446,7 @@ cbb_chipinit(struct cbb_softc *sc)
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/* Use PCI interrupt for interrupt routing */
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PCI_MASK2_CONFIG(sc->dev, CBBR_BRIDGECTRL,
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& ~(CBBM_BRIDGECTRL_MASTER_ABORT |
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CBBM_BRIDGECTRL_INTR_IREQ_EN),
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CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN),
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| CBBM_BRIDGECTRL_WRITE_POST_EN,
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2);
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@ -82,7 +82,7 @@
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#define CBBR_BRIDGECTRL 0x3e /* len=2 */
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# define CBBM_BRIDGECTRL_MASTER_ABORT 0x0020
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# define CBBM_BRIDGECTRL_RESET 0x0040
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# define CBBM_BRIDGECTRL_INTR_IREQ_EN 0x0080
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# define CBBM_BRIDGECTRL_INTR_IREQ_ISA_EN 0x0080
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# define CBBM_BRIDGECTRL_PREFETCH_0 0x0100
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# define CBBM_BRIDGECTRL_PREFETCH_1 0x0200
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# define CBBM_BRIDGECTRL_WRITE_POST_EN 0x0400
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