- Don't add IFM_NONE when used in combination with pcn(4) as for MII
loopback to work PCnet chips additionally need to be placed into
external loopback mode which pcn(4) doesn't do so far.
- In nsphy_service() just use if_dname instead of determining the name
of the parent NIC via device_get_name(device_get_parent(sc->mii_dev)).
- Don't set MIIF_NOISOLATE, except for when used in combination with a
NIC that wedges when isolating the PHYs, so nsphy(4) can be used in
configurations with multiple PHYs.
- Use mii_phy_add_media() instead of mii_add_media() so the latter can
be eventually retired.
- Take advantage of mii_phy_setmedia() (requires the MIIF_FORCEANEG
added in sys/dev/mii/mii_physubr.c 1.26, sys/dev/mii/miivar.h 1.19).
- Implement a separate nsphy_reset(). There are two reasons for this:
1) This PHY can take an inordinate amount of time to reset if media
is attached; under fairly normal circumstances up to nearly one
second. This is because it appears to go through an implicit auto-
negotiation cycle as part of the reset.
2) During reset and auto-negotiation, the BMCR will clear the reset
bit before the process is complete. It will return 0 until the
process is complete and it's safe to access the PHY again.
This is the first of two changes required to make the combination of
Am79c971 and DP83840A found on certain HP cards and on-board in IBM
machines work.
- Fix some whitespace nits.
Based on: NetBSD (except for the first and second item)
MFC after: 2 weeks
This commit is contained in:
Marius Strobl
parent
1f4308521e
commit
fb58dc87ca
@ -117,6 +117,7 @@ DRIVER_MODULE(nsphy, miibus, nsphy_driver, nsphy_devclass, 0, 0);
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static int nsphy_service(struct mii_softc *, struct mii_data *, int);
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static void nsphy_status(struct mii_softc *);
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static void nsphy_reset(struct mii_softc *);
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static int
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nsphy_probe(device_t dev)
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@ -128,7 +129,7 @@ nsphy_probe(device_t dev)
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if (MII_OUI(ma->mii_id1, ma->mii_id2) == MII_OUI_NATSEMI &&
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MII_MODEL(ma->mii_id2) == MII_MODEL_NATSEMI_DP83840) {
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device_set_desc(dev, MII_STR_NATSEMI_DP83840);
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} else
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} else
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return (ENXIO);
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return (BUS_PROBE_DEFAULT);
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@ -140,6 +141,7 @@ nsphy_attach(device_t dev)
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struct mii_softc *sc;
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struct mii_attach_args *ma;
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struct mii_data *mii;
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const char *nic;
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sc = device_get_softc(dev);
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ma = device_get_ivars(dev);
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@ -152,38 +154,51 @@ nsphy_attach(device_t dev)
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sc->mii_service = nsphy_service;
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sc->mii_pdata = mii;
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#ifdef foo
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/*
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* i82557 wedges if all of its PHYs are isolated!
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*/
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if (strcmp(device_get_name(device_get_parent(sc->mii_dev)),
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"fxp") == 0 && mii->mii_instance == 0)
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#endif
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sc->mii_flags |= MIIF_NOISOLATE;
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mii->mii_instance++;
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nic = device_get_name(device_get_parent(sc->mii_dev));
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/*
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* Am79C971 and i82557 wedge when isolating all of their
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* (external) PHYs.
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*/
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if (strcmp(nic, "fxp") == 0 || strcmp(nic, "pcn") == 0)
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sc->mii_flags |= MIIF_NOISOLATE;
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/*
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* DP83840A used with HME chips don't advertise their media
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* capabilities themselves properly so force writing the ANAR
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* according to the BMSR in mii_phy_setmedia().
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*/
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if (strcmp(nic, "hme") == 0)
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sc->mii_flags |= MIIF_FORCEANEG;
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#define ADD(m, c) ifmedia_add(&mii->mii_media, (m), (c), NULL)
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#if 0
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/* Can't do this on the i82557! */
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_NONE, 0, sc->mii_inst),
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BMCR_ISO);
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/*
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* In order for MII loopback to work Am79C971 and greater PCnet
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* chips additionally need to be placed into external loopback
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* mode which pcn(4) doesn't do so far.
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*/
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if (strcmp(nic, "pcn") != 0)
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#if 1
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP,
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sc->mii_inst), BMCR_LOOP|BMCR_S100);
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#else
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if (strcmp(nic, "pcn") == 0)
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sc->mii_flags |= MIIF_NOLOOP;
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#endif
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ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_LOOP, sc->mii_inst),
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BMCR_LOOP|BMCR_S100);
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mii_phy_reset(sc);
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nsphy_reset(sc);
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sc->mii_capabilities =
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PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
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device_printf(dev, " ");
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mii_add_media(sc);
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mii_phy_add_media(sc);
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printf("\n");
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#undef ADD
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MIIBUS_MEDIAINIT(sc->mii_dev);
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return(0);
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return (0);
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}
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static int
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@ -191,7 +206,6 @@ nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
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{
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struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
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int reg;
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device_t parent;
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switch (cmd) {
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case MII_POLLSTAT:
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@ -219,8 +233,6 @@ nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
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if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
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break;
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parent = device_get_parent(sc->mii_dev);
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reg = PHY_READ(sc, MII_NSPHY_PCR);
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/*
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@ -254,36 +266,10 @@ nsphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
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*/
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reg |= 0x0100 | 0x0400;
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if (strcmp(device_get_name(parent), "fxp") == 0)
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if (strcmp(mii->mii_ifp->if_dname, "fxp") == 0)
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PHY_WRITE(sc, MII_NSPHY_PCR, reg);
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switch (IFM_SUBTYPE(ife->ifm_media)) {
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case IFM_AUTO:
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/*
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* If we're already in auto mode and don't hang off
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* of a hme(4), just return. DP83840A on hme(4) don't
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* advertise their media capabilities themselves
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* properly so force writing the ANAR according to
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* the BMSR by mii_phy_auto() every time.
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*/
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if ((PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN) == 0 &&
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strcmp(device_get_name(parent), "hme") != 0)
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return (0);
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(void) mii_phy_auto(sc);
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break;
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case IFM_100_T4:
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/*
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* XXX Not supported as a manual setting right now.
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*/
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return (EINVAL);
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default:
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/*
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* BMCR data is stored in the ifmedia entry.
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*/
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PHY_WRITE(sc, MII_ANAR,
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mii_anar(ife->ifm_media));
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PHY_WRITE(sc, MII_BMCR, ife->ifm_data);
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}
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mii_phy_setmedia(sc);
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break;
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case MII_TICK:
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@ -309,6 +295,7 @@ static void
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nsphy_status(struct mii_softc *sc)
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{
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struct mii_data *mii = sc->mii_pdata;
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struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
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int bmsr, bmcr, par, anlpar;
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mii->mii_media_status = IFM_AVALID;
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@ -378,5 +365,46 @@ nsphy_status(struct mii_softc *sc)
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mii->mii_media_active |= IFM_FDX;
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#endif
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} else
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mii->mii_media_active |= mii_media_from_bmcr(bmcr);
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mii->mii_media_active = ife->ifm_media;
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}
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static void
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nsphy_reset(struct mii_softc *sc)
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{
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struct ifmedia_entry *ife = sc->mii_pdata->mii_media.ifm_cur;
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int reg, i;
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if (sc->mii_flags & MIIF_NOISOLATE)
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reg = BMCR_RESET;
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else
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reg = BMCR_RESET | BMCR_ISO;
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PHY_WRITE(sc, MII_BMCR, reg);
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/*
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* Give it a little time to settle in case we just got power.
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* The DP83840A data sheet suggests that a soft reset should not
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* happen within 500us of power being applied. Be conservative.
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*/
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DELAY(1000);
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/*
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* Wait another 2s for it to complete.
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* This is only a little overkill as under normal circumstances
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* the PHY can take up to 1s to complete reset.
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* This is also a bit odd because after a reset, the BMCR will
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* clear the reset bit and simply reports 0 even though the reset
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* is not yet complete.
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*/
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for (i = 0; i < 1000; i++) {
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reg = PHY_READ(sc, MII_BMCR);
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if (reg != 0 && (reg & BMCR_RESET) == 0)
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break;
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DELAY(2000);
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}
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if ((sc->mii_flags & MIIF_NOISOLATE) == 0) {
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if ((ife == NULL && sc->mii_inst != 0) ||
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(ife != NULL && IFM_INST(ife->ifm_media) != sc->mii_inst))
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PHY_WRITE(sc, MII_BMCR, reg | BMCR_ISO);
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}
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}
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