Remove the merlin delay workaround here, it isn't appropriate for
the analog bank writes as Merlin never does them.
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@ -976,12 +976,6 @@ ath_hal_ini_bank_write(struct ath_hal *ah, const HAL_INI_ARRAY *ia,
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for (r = 0; r < ia->rows; r++) {
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OS_REG_WRITE(ah, HAL_INI_VAL(ia, r, 0), data[r]);
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/* Analog shift register delay seems needed for Merlin - PR kern/154220 */
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/* XXX verify whether any analog radio bank writes will hit up this */
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/* XXX since this is a merlin work-around; and merlin doesn't use radio banks */
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if (HAL_INI_VAL(ia, r, 0) >= 0x7800 && HAL_INI_VAL(ia, r, 0) < 0x78a0)
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OS_DELAY(100);
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DMA_YIELD(regWr);
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}
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return regWr;
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