PR kern/20895:
- Add FE_DAC new feature flag to distinguish between
64 bit PCI addressing (DAC cycles) and 64 bit PCI
interface (64 bit Memory BARs).
- Properly deal with chips that have a 32 bit PCI
interface but support and may generate DAC.
(Only SYM53C895A for now).
PR misc/17584 (at least partially addressed):
- Try detecting hardware combinations that trigger
spurious PCI master parity error detections by the
PCI chip. This work-around is implemented in the
`snooptest' routine and consists in retrying with
PCI master parity checking disabled if such an
error is reported by the PCI chip during this test.
Other:
- Fix a tiny bug in WIDE negotiation that was very
unlikely to be triggerred. The BUS width was wrongly
compared against chip's max. offset.
- Get rid of a fiew uselessly `long' variables
and casts to `long'.
- Estimate the PCI clock for all chips, except
C1010 for now (we should do that for each PCI BUS)
- Refine a couple of C1010 errata work-arounds.
- For now, make sure AIP generation is disabled
for the C1010-66.
53C810 non 'A', 53C815 and 53C825 non 'A' are now
attached by the driver (by default).
The driver uses a different SCRIPTS set based on
MEMORY MOVE instructions for these chips.
2 SCRIPTS sets (firmwares) numbered #1 and #2 are
used for the whole support of the 53C8XX family
to get possible:
- FW #1 : Only based on MEMORY MOVE instructions.
Selected for 810, 815, 825.
- FW #2 : LOAD/STORE based. This is the firmware
also used by previous driver versions.
Selected for other chips.
When both `ncr' and `sym' are configured, `sym'
will now attach all the 53C8XX devices by default.
Previous balancing between `ncr' and `sym' can be
preserved by:
- Either editing sym_conf.h and commenting the
following compile option:
#define SYM_CONF_GENERIC_SUPPORT
(This also saves about 3.5Kb of kernel memory).
- Or setting kernel config option
SYM_SETUP_LP_PROBE_MAP to 64 (bit 0x40)
- Set MAX_OFFS driver compile option to 63 (was 64 which is wrong).
- Fix a typo in the SYMBIOS NVRAM layout structure and add field and
bit definition for the support of PIM_NOBUSRESET.
- Report to XPT PIM_NOBUSRESET and PIM_SCANHILO if set by user in NVRAM.
- Negotiate SYNC immediately after WIDE response from the target as
suggested by Justin Gibbs.
- Remove some misleading comment about CmdQue handling by CAM.
- Apply correctly the MAX_WIDE and MAX_OFFS driver options.
(pci dev_id 0x21).
- Start the SCRIPTS processor without resetting the SCSI BUS
at initialization.
- Remove the "Host adapter CCB chain" (got useless given the
new queuing scheme).
- Display correctly the state of SCSI signals, when SCSI BUS
looks bad.
- Cosmetic changes in messages printed out at initialization.
- Notifications and messages on RESET conditions slightly
reworked.
- TEKRAM 24C16 NVRAM support fixed (also reported ok).
broken bit work-around enabled.
* Fixed a bug that made MDP not work. (However, MDP is actually not tested
due to lack of hardware using this feature).
* Chip table changed to support the C1010 B0 w/o the U3EN bit work-around
enabled.
* Add the SYM_SETUP_MAX_LUN, SYM_SETUP_LP_PROBE_MAP (used to tell the
driver about chips that are to be claimed with lower priority than old
PCI bus based driver (typically the ncr)), SYM_SETUP_SCSI_DIFF, and
SYM_SETUP_PCI_PARITY options.
Submitted by: Gerard Roudier <groudier@club-internet.fr>
PCI SCSI controllers. This driver also supports the following Symbios/LSI
PCI SCSI chips: 53C810A, 53C825A, 53C860, 53C875, 53C876, 53C885, 53C895.
However, it does NOT support earlier chips as the following ones: 53C810,
53C815, 53C825.
See README.sym for more details.
Submitted-by: Gerard Roudier <groudier@club-internet.fr>
