whose name is within that block must ensure not only that the block
containing the file name has been written, but also that the on-disk
directory inode references that block. When a new directory block
is created, we allocate a newdirblk structure which is linked to
the associated allocdirect (on its ad_newdirblk list). When the
allocdirect has been satisfied, the newdirblk structure is moved
to the inodedep id_bufwait list of its directory to await the inode
being written. When the inode is written, the directory entries
are fully committed and can be deleted from their pagedep->id_pendinghd
and inodedep->id_pendinghd lists.
the number of references on the filesystem root vnode to be both
expected and released. Many filesystems hold an extra reference on
the filesystem root vnode, which must be accounted for when
determining if the filesystem is busy and then released if it isn't
busy. The old `skipvp' approach required individual filesystem
xxx_unmount functions to re-implement much of vflush()'s logic to
deal with the root vnode.
All 9 filesystems that hold an extra reference on the root vnode
got the logic wrong in the case of forced unmounts, so `umount -f'
would always fail if there were any extra root vnode references.
Fix this issue centrally in vflush(), now that we can.
This commit also fixes a vnode reference leak in devfs, which could
result in idle devfs filesystems that refuse to unmount.
Reviewed by: phk, bp
soon attach directly to pcic rather than the kludge pci-pcic device we
have now.
In some ways, this is similar to the work PAO3 did to try to support
cardbus bridges. In some ways different. This and future commits
will be taking from the spirit of many of those changes. pcicvar.h is
completely different from the pcicvar.h that appeared in PAO3, but
similar in concept.
registers better. Hold sched_lock not only for checking the flag but
also while performing the actual operation to ensure the process doesn't
get swapped out by another CPU while we the operation is being performed.
controller found in many of the early NOTE98 machines that were
produced. This controller is completely unlike the intel 82365, so
I've separated it out from the main pcic driver.
- Require the proc lock be held for killproc() to allow for the vmdaemon to
kill a process when memory is exhausted while holding the lock of the
process to kill.
- Don't hold Giant in the swapper daemon while we walk the list of
processes looking for a process to swap back in.
- Don't bother grabbing the sched_lock while checking a process' sleep
time in swapout_procs() to ensure that a process has been idle for at
least swap_idle_threshold2 before swapping it out. If we lose the race
we just let a process stay in memory until the next call of
swapout_procs().
- Remove some unneeded spl's, sched_lock does all the locking needed in
this case.
be unions with enough padding to make sure they always end up being
a multiple of 8 bytes in size, since the 83820/83821 chips require
descriptors to be aligned on 64-bit boundaries. I happened to get it
right for the 32-bit descriptor/x86 case, but botched everything else.
Things should work properle on 32-bit/64-bit platforms now.
Note that the 64-bit descriptor format isn't being used currently.
ahc_pci.c:
Prepare for making ahc a module by adding module dependency
and version info.
aic7770.c:
Remove linux header ifdefs. The headers are handled differently
in Linux where local includes (those using "'s instead of <>'s)
are allowed.
Don't map our interrupt until after we are fully setup to
handle interrupts. Our interrupt line may be shared so
an interrupt could occur at any time.
aic7xxx.c:
Remove linux header ifdefs.
current->curr to avoid Linux's use of current as a
#define for the current task on some architectures.
Add a helper function, ahc_assert_atn(), for use in
message phases we handle manually. This hides the fact
that U160 chips with the expected phase matching disabled
need to have SCSISIGO updated differently.
if (ahc_check_residual(scb) != 0)
ahc_calc_residual(scb);
else
ahc_set_residual(scb, 0);
becomes:
ahc_update_residual(scb);
Modify scsi parity error (or CRC error) handling to
reflect expected phase being disabled on U160 chips.
Move SELTO handling above BUSFREE handling so we can
use the new busfree interrupt behavior on U160 chips.
In ahc_build_transfer_msg() filter the period and ppr_options
prior to deciding whether a PPR message is required.
ppr_options may be forced to zero which will effect our
decision.
Correct a long standing but latent bug in ahc_find_syncrate().
We could choose a DT only rate even though DT transfers were
disabled. In the CAM environment this was unlikely as CAM
filters our rate to a non-DT value if the device does not
support such rates.
When displaing controller characteristics, include the
speed of the chip. This way we can modify the transfer
speed based on optional features that are enabled/disabled
in a particular application.
Add support for switching from fully blown tagged queing
to just using simple queue tags should the device reject
an ordered tag.
Remove per-target "current" disconnect and tag queuing
enable flags. These should be per-device and are not
referenced internally be the driver, so we let the OSM
track this state if it needs to.
Use SCSI-3 message terminology.
aic7xxx.h:
The real 7850 does not support Ultra modes, but there are
several cards that use the generic 7850 PCI ID even though
they are using an Ultra capable chip (7859/7860). We start
out with the AHC_ULTRA feature set and then check the
DEVSTATUS register to determine if the capability is really
present.
current -> curr
ahc_calc_residual() is no longer static allowing it to
be called from ahc_update_residual() in aic7xxx_inline.h.
Update some serial eeprom definitions for the latest
BIOS versions.
aic7xxx.reg:
Add a combined DATA_PHASE mask to the SCSIPHASE register
definition to simplify some sequencer code.
aic7xxx.seq:
Take advantage of some performance features available only
on the U160 chips. The auto-ack feature allows us to ack
data-in phases up to the data-fifo size while the sequencer
is still setting up the DMA engine. This greatly reduces
read transfer latency and simplifies testing for transfer
complete (check SCSIEN only). We also disable the expected
phase feature, and enable the new bus free interrupt behavior,
to avoid a few instructions.
Re-arrange the Ultra2+ data phase handling to allow us to
do more work in parallel with the data fifo flushing on a
read.
On an SDTR, ack the message immediately so the target can
prepare the next phase or message byte in parallel with
our work to honor the message.
aic7xxx_93cx6.c:
Remove linux header ifdefs.
aic7xxx_freebsd.c:
current -> curr
Add a module event handler.
Handle tag downgrades in our ahc_send_async() handler.
We won't be able to downgrade to "basic queuing" until
CAM is made aware of this queuing type.
aic7xxx_freebsd.h:
Include cleanups.
Define offsetof if required.
Correct a few comments.
Update prototype of ahc_send_async().
aic7xxx_inline.h:
Implement ahc_update_residual().
aic7xxx_pci.c:
Remove linux header ifdefs.
Correct a few product strings.
Enable several U160 performance enhancing features.
Modify Ultra capability determination so we will enable
Ultra speeds on devices with a 7850 PCI id that happen
to really be a 7859 or 7860.
Don't map our interrupt until after we are fully setup to
handle interrupts. Our interrupt line may be shared so
an interrupt could occur at any time.
of " &= ". Also change the MII PHY device mask to check the correct bits.
Cookie to: Andre Albsmeier <andre.albsmeier@mchp.siemens.de>
Pointy hat to: me
have bad grounding characteristics which allow small static discharges
(or sunspots, we're not 100% sure which) to reach the bridge chip.
This causes the bridge chip to wedge/reset itself. There's no known
cure short of rebooting.
The bug manifests itself by the STAT_CHG return 0xff when read. This
is impossible because the upper bits are reserved (and therefore
zero). In addition, some of the lower bits are one only for memory
cards, which OLDCARD doesn't support, so if they are set, something
seriously foobar'd is going on.
So far we've seen this in exactly one brand of pcmcia <-> isa bridge
which plug and play identifies only as "VIA PCMCIA CARD". This card
just has buffers on the isa card and the actual bridge chip on the
remote slot, which is connected by long ribbon cables. We think this
long cable run, coupled with the lack of coupling capacitors is a
major reason why it is so static sensitive while its bretheren aren't.
Work Supported by: Timing Solutions, Inc.
MFC After: 3 days
. FD_CLRERR clears the error counter, thus re-enables kernel error
printf()s,
. FD_GSTAT obtains the last FDC operation state, if any,
. FDOPT_NOERRLOG (temporarily) turns off kernel printf() floppy
error logging,
. FDOPT_NOERROR makes the kernel ignore an FDC error, thus can
enable the transfer of an erroneous sector to the user application
All options are being cleared on (last) close.
Prime consumer of the last features will be fdread(1), to be committed
shortly.
(FD_CLRERR should be wired into fdcontrol(8), but then fdcontrol(8)
needs a major rewrite anyway.)
