Commit Graph

547 Commits

Author SHA1 Message Date
Warner Losh
795dceffa2 Two fixes:
(1) Fix pcib_read/write_config prototypes.
(2) When contrainting a resource request for a 'subtractive' bridge,
    it is important to select a range outside the base/limit
    registers, since those are the only values known to not
    possibly work.  On my HP laptop, the base bridge excludes I/O
    ports 0xa000-0xafff, however that was the range we were passing
    up the tree.  Instead, when a range spans the "hole" we now
    arbitrarily pick the range just above the hole to allocate from.

All of my rl and xl cards, at a minimum, started working again on this
laptop with those fixes.
2009-03-14 14:08:53 +00:00
Marcel Moolenaar
d175be464e Fix a buglet in revision 189401: when restoring a 64-bit BAR,
write the upper 32-bits in the adjacent bar. The consequences
of the buglet were severe enough though: a machine check.
2009-03-10 06:21:52 +00:00
Robert Noland
41b3a23249 Invert the logic error for the MSI/MSIX vs INTx case.
Pointyhat to:	me

MFC after:	3 days
2009-03-06 11:24:42 +00:00
John Baldwin
c4e8c9df9e Always read/write the full 64-bit value of 64-bit BARs. Specifically,
when determining the size of a BAR by writing all 1's to the BAR and
reading back the result, always operate on the full 64-bit size.

Reviewed by:	imp
MFC after:	1 month
2009-03-05 15:33:04 +00:00
John Baldwin
d004885d3a Honor the prefetchable flag in memory BARs by setting the RF_PREFETCHABLE
flag when calling bus_alloc_resource() to allocate resources from a parent
PCI bridge.  For PCI-PCI bridges this asks the bridge to satisfy the
request using the prefetchable memory range rather than the normal
memory range.

Reviewed by:	imp
Reported by:	scottl
MFC after:	1 week
2009-03-05 15:28:46 +00:00
John Baldwin
e8b145c2ba The recent PCI resource allocation fixes exposed a bug where the same
BAR could be allocated twice by different children of a vgapci0 device.
To fix this, change the vgapci0 device to track references on its associated
resources so that they are only allocated once from the parent PCI bus and
released when no children are using them.  Previously this leaked a small
amount of KVA on at least some architectures.
2009-03-04 21:04:52 +00:00
Robert Noland
a9f33b974a Extend the management of PCIM_CMD_INTxDIS.
We now explicitly enable INTx during bus_setup_intr() if it is needed.
Several of the ata drivers were managing this bit internally.  This is
better handled in pci and it should work for all drivers now.

We also mask INTx during bus_teardown_intr() by setting this bit.

Reviewed by:	jhb
MFC after:	3 days
2009-03-04 18:23:48 +00:00
John Baldwin
6b0ff427a5 Further refine the handling of resources for BARs in the PCI bus driver.
A while back, Warner changed the PCI bus code to reserve resources when
enumerating devices and simply give devices the previously allocated
resources when they call bus_alloc_resource().  This ensures that address
ranges being decoded by a BAR are always allocated in the nexus0 device
(or whatever device the PCI bus gets its address space from) even if a
device driver is not attached to the device.  This patch extends this
behavior further:
- To let the PCI bus distinguish between a resource being allocated by
  a device driver vs. merely being allocated by the bus, use
  rman_set_device() to assign the device to the bus when it is owned
  by the bus and to the child device when it is allocated by the child
  device's driver.  We can now prevent a device driver from allocating
  the same device twice.  Doing so could result in odd things like
  allocating duplicate virtual memory to map the resource on some
  archs and leaking the original mapping.
- When a PCI device driver releases a resource, don't pass the request
  all the way up the tree and release it in the nexus (or similar device)
  since the BAR is still active and decoding.  Otherwise, another device
  could later allocate the same range even though it is still in use.
  Instead, deactivate the resource and assign it back to the PCI bus
  using rman_set_device().
- pci_delete_resource() will actually completely free a BAR including
  attemping to disable it.
- Disable BAR decoding via the command register when sizing a BAR in
  pci_alloc_map() which is used to allocate resources for a BAR when
  the BIOS/firmware did not assign a usable resource range during boot.
  This mirrors an earlier fix to pci_add_map() which is used when to
  size BARs during boot.
- Move the activation of I/O decoding in the PCI command register into
  pci_activate_resource() instead of doing it in pci_alloc_resource().
  Previously we could actually enable decoding before a BAR was
  initialized via pci_alloc_map().

Glanced at by:	bsdimp
2009-03-03 16:38:59 +00:00
Robert Noland
5884a846e7 Disable INTx when enabling MSI/MSIX
This addresses interrupt storms that were noticed after enabling MSI
in drm.  I think this is due to a loose interpretation of the PCI 2.3
spec, which states that a function using MSI is prohibitted from using
INTx.  It appears that some vendors interpretted that to mean that they
should handle it in hardware, while others felt it was the drivers
responsibility.

This fix will also likely resolve interrupt storm related issues with
devices other than drm.

Reviewed by:	jhb@
MFC after:	3 days
2009-03-02 19:00:41 +00:00
John Baldwin
34a839f108 Don't throw away upper 32-bits of the HT MSI address window. In practice
this is harmless since the address window for MSI on x86 is in the lower
4 GB.

Submitted by:	mav
MFC after:	1 week
2009-02-26 14:32:14 +00:00
Alexander Motin
b8adaa5549 Add SATA and PCI Advanced Features capabilities constants. 2009-02-15 09:49:21 +00:00
John Baldwin
da1e0915c5 - Add a new ioctl to /dev/pci to fetch details on an individual BAR of a
device.  The details include the current value of the BAR (including all
  the flag bits and the current base address), its length, and whether or not
  it is enabled.  Since this operation is not invasive, non-root users are
  allowed to use it (unlike manual config register access which requires
  root).  The intention is that userland apps (such as Xorg) will use this
  interface rather than dangerously frobbing the BARs from userland to
  obtain this information.
- Add a new sub-mode to the 'list' mode of pciconf.  The -b flag when used
  with -l will now list all the active BARs for each device.

MFC after:	1 month
2009-02-02 19:54:16 +00:00
Nathan Whitehorn
f5a78b2f7e Change the probe priority for PCI and I2C generic bus modules from
numerical constants to BUS_PROBE_GENERIC.

Suggested by:	jhb
2009-01-20 00:05:43 +00:00
John Baldwin
589d604bf9 Disable decoding of BARs by devices before we trash the value in the BAR
by writing all 1's to it to determine its length.  This fixes issues with
MCFG on at least some machines where a trashed BAR claimed subsequent
attempts at PCI config transactions because the addresses in the MCFG
window fell in the decoding range of the BAR.

In general it is a bad idea to leave the BARs enabled while we are
frobbing with them in this manner.

Sleuthing by:  tegge
MFC after:     1 week
2009-01-16 22:22:30 +00:00
Alexander Motin
2e013ce0e3 Add ADMA, SATA and SAS mass storage subclasses reporting. 2008-11-13 19:57:33 +00:00
Warner Losh
8481e37b53 Nit: Add a few leading zeros to make this match other mask constants
in this file.  Also to make sure that I got other ASI constants right.
2008-11-03 15:38:45 +00:00
Alexander Motin
c5343d0981 Add HDA multimedia subclass. 2008-10-21 21:53:55 +00:00
Alexander Motin
a9217b5f74 Add "SD host controller" subclass name. 2008-10-21 20:55:41 +00:00
Robert Noland
6be0323d97 pci_setup_intr() will only enable MSI/MSI-X for direct children. Add methods
to vga_pci.c to request on behalf of it's children.  This causes vgapci to show
up as the interrupt owner in vmstat -i, rather than the child device.

Approved by:	jhb(mentor)
2008-09-19 19:11:35 +00:00
John Baldwin
e7e2941b81 Allow child devices of vgapci(4) to query VPD strings and use MSI/MSI-X
interrupts.  For the MSI/MSI-X case, we only allow 1 child device to use
MSI or MSI-X at a time.

Tested by:	rnoland
2008-09-16 19:52:02 +00:00
Warner Losh
7589f19e81 Style nit. Continued lines are indented 2 spaces in this file. 2008-09-03 06:57:21 +00:00
Warner Losh
696771ee0a Cope with errors from device_get_children(). These errors can happen
only in low memory situations, so the error fork of these fixes is
lightly tested, but they should do the least-wrong thing...

Submitted by:	Hans Petter Selasky
2008-08-23 07:23:52 +00:00
Warner Losh
de5d443f0f Cosmetic nit. 2008-08-23 07:18:30 +00:00
John Baldwin
9c0e9e988e The config space registers holding the upper 32-bits of the prefetchable
memory area's base and limit are optional.  The low 4-bits of the "low"
prefetchable registers indicates whether or not a 32-bit or 64-bit
region is supported.  The PCI-PCI driver had been assuming that all bridges
supported a 64-bit region (and thus the two upper 32-bit registers).  Fix
the driver to only use those registers if the low 4-bits of the "low"
registers indicate that a 64-bit region is supported.  The PCI-PCI bridge
in the XBox happens to be a bridge that only supports a 32-bit region.

Reported by:	rink
MFC after:	1 week
2008-08-20 18:29:59 +00:00
Warner Losh
7e178674ff Update a comment about not numbering pci busses. This may soon be
OBE, but was sitting around in one of my trees for a while...
2008-08-17 17:34:07 +00:00
Warner Losh
e4e130244d Remove useless #if 1. 2008-08-16 21:51:54 +00:00
Warner Losh
abf07f13fd Add some sysctl reporting for most pci_pci bridges. We now report
domain, pribus (the primary bus, eg the bus that this chip is on),
secbus (the secondary bus, eg the bus immediately behind this chip)
and subbus (the number of the highest bus behind this chip).
Normally, this information is reported via bootverbose parameters, but
that's hard to use for debugging in some cases.

This adds reading of pribus to make this happen.  In addition, change
the narrow types to u_int to allow for easier reporting via sysctl for
domain, secbus and subbus.  This should have no effect, but if it
does, please let me know.
2008-08-16 20:18:40 +00:00
Warner Losh
e33abcc50c Change -1 to 0xfffffffful since the interface returns uint32_t. 2008-08-09 03:54:12 +00:00
John Baldwin
73492bc0b1 Remove the second check for a 64-bit BAR value on a 32-bit system in
pci_add_map().  First, this condition is already handled earlier in
the function.  Second, as written the check would never fire as the
'start' value was overwritten with a long value (rman_get_start() returns
long) before the comparison was done.

Discussed with:	imp
MFC after:	2 weeks
2008-08-05 21:04:00 +00:00
John Baldwin
e29bfa9ed9 If the kernel fails to allocate resources for the initial value of a BAR
for a PCI device during the boot-time probe of the parent PCI bus, then
zero the BAR and clear the resource list entry for that BAR.  This forces
the PCI bus driver to request a valid resource range from the parent bridge
driver when the device driver tries to allocate the BAR.  Similarly, if the
initial value of a BAR is a valid range but it is > 4GB and the current OS
only has 32-bit longs, then do a full teardown of the initial value of the
BAR to force a reallocation.

Reviewed by:	imp
MFC after:	1 week
2008-08-05 18:24:41 +00:00
Luoqi Chen
4522ac77de SATA device on some nForce based boards could get confused if MSI is not
used but MSI to HyperTransport IRQ mapping is enabled, and would act as
if MSI is turned on, resulting in interrupt loss.

This commit will,
1. enable MSI mapping on a device only when MSI is enabled for that
   device and the MSI address matches the HT mapping window.
2. enable MSI mapping on a bridge only when a downstream device is
   allocated an MSI address in the mapping window

PR:		kern/118842
Reviewed by:	jhb
MFC after:	1 week
2008-07-23 09:44:36 +00:00
Marius Strobl
44f8f2fc05 Remove some remnant alpha hacks.
Approved by:	PCI-maintainers (imp, jhb)
2008-04-26 14:13:48 +00:00
Poul-Henning Kamp
3b33782a3e Remove a trailing comma which FlexeLint whines about. 2008-04-12 20:26:07 +00:00
John Baldwin
138e8d08b0 Relax the check for a PCI-express chipset by assuming the system is a
PCI-express chipset (and thus has functional MSI) if there are any
PCI-express devices in the system, not requiring a root port device.

With PCI-X the chipset detection has to be very conservative because there
are known systems with PCI-X devices that do not appear to have PCI-X
chipsets.  However, with PCI-express I'm not sure it is possible to have
a PCI-express device in a system with a non-PCI-express chipset.  If we
assume that is the case then this change is valid.  It is also required
for at least some PCI-express systems that don't have any devices with
a root port capability (some ICH9 systems).

MFC after:	1 week
Reported by:	jfv
2008-02-01 20:31:09 +00:00
John Baldwin
0678f786c4 Don't cache the new-bus name of a PCI device in the PCI conf structure,
but reread it from the device_t every time the device list is fetched.
Previously the device name in pciconf -l would not be updated when a driver
was unloaded or if a device was detached and attached to a different
driver.

MFC after:	1 week
PR:		kern/104777
Submitted by:	"Iasen Kostoff"  tbyte | otel net
2008-01-15 21:40:46 +00:00
Marius Strobl
c5860546c4 Fix some bugs in the FreeBSD 4/5/6 pci(4) IOCTLs compatibility code:
- Use the correct offsets when copying out the results of PCIOCGETCONF_OLD.
  This happened to not affect the 64-bit architectures because there the
  addition of pc_domain to struct pcisel didn't change the overall size of
  struct pci_conf. [1]
- Always copy the name and unit information to conf_old so it's also part
  of the output once this information is cached in dinfo.
- Use the correct type for flags in struct pci_match_conf_old. This
  change is more or less cosmetic though.

Reported and tested by:	bde [1]
Reviewed by:		imp
MFC after:		3 days
Committed from:		24C3
2007-12-26 21:50:59 +00:00
Jung-uk Kim
4ea603ec6b Make VPD register access more robust:
- Implement timing out of VPD register access.[1]
- Fix an off-by-one error of freeing malloc'd space when checksum is invalid.
- Fix style(9) bugs, i.e., sizeof cannot be followed by space.
- Retire now obsolete 'hw.pci.enable_vpd' tunable.

Submitted by:	cokane (initial revision)[1]
Reviewed by:	marius (intermediate revision)
Silence from:	jhb, jmg, rwatson
Tested by:	cokane, jkim
MFC after:	3 days
2007-11-16 20:49:34 +00:00
Warner Losh
b2068c0c18 Simplify the old compat #ifdefs. 2007-10-26 05:02:47 +00:00
Marius Strobl
33d3fffa90 Add ABI backwards compatibility to the FreeBSD 4/5/6 versions of
the PCIOCGETCONF, PCIOCREAD and PCIOCWRITE IOCTLs, which was broken
with the introduction of PCI domain support.
As the size of struct pci_conf_io wasn't changed with that commit,
this unfortunately requires the ABI of PCIOCGETCONF to be broken
again in order to be able to provide backwards compatibility to
the old version of that IOCTL.

Requested by:	imp
Discussed with:	re (kensmith)
Reviewed by:	PCI maintainers (imp, jhb)
MFC after:	5 days
2007-10-24 20:51:44 +00:00
Marius Strobl
55aaf894e8 Make the PCI code aware of PCI domains (aka PCI segments) so we can
support machines having multiple independently numbered PCI domains
and don't support reenumeration without ambiguity amongst the
devices as seen by the OS and represented by PCI location strings.
This includes introducing a function pci_find_dbsf(9) which works
like pci_find_bsf(9) but additionally takes a domain number argument
and limiting pci_find_bsf(9) to only search devices in domain 0 (the
only domain in single-domain systems). Bge(4) and ofw_pcibus(4) are
changed to use pci_find_dbsf(9) instead of pci_find_bsf(9) in order
to no longer report false positives when searching for siblings and
dupe devices in the same domain respectively.
Along with this change the sole host-PCI bridge driver converted to
actually make use of PCI domain support is uninorth(4), the others
continue to use domain 0 only for now and need to be converted as
appropriate later on.
Note that this means that the format of the location strings as used
by pciconf(8) has been changed and that consumers of <sys/pciio.h>
potentially need to be recompiled.

Suggested by:	jhb
Reviewed by:	grehan, jhb, marcel
Approved by:	re (kensmith), jhb (PCI maintainer hat)
2007-09-30 11:05:18 +00:00
Stephane E. Potvin
1a2952820d - Fix a small bit slip in PCIM_PCAP_D[0-2]PME defines.
- Add the definitions for D3PME_COLD and D3PME_HOT capabilities.

Reviewed by:	njl (mentor), imp
Approved by:	re (kensmith)
MFC after:	1 week
2007-09-19 13:05:58 +00:00
Marcel Moolenaar
7f67bed625 In pci_alloc_map(), restore the original value of the BAR for
the duration of the function.  The device we would otherwise
have left in an useless state may just as well be the low-level
console. When booting verbose, we do need it addressable if we
want to avoid a MCA.

Approved by: re (kensmith)
2007-07-29 02:44:41 +00:00
Andrew Gallatin
bd82bbb145 Fix a typo in pcib_alloc_msi{x} which resulted in the
device's, not the bridge's, softc to be used to check the
PCIB_DISABLE_MSI flag.  This resulted in randomly allowing
or denying MSI interrupts based on whatever value the driver
happened to store at sizeof(device_t) bytes into its softc.

I noticed this when I stopped getting MSI interrupts
after slighly re-arranging mxge's softc yesterday.
2007-05-23 15:31:00 +00:00
John Baldwin
81c8102c4c Don't completely skip pci_cfg_save() in the PCI nomatch routine if
the power_nodriver tunable is off.  pci_cfg_save() already checks the
tunable internally, and no other callers of pci_cfg_save() check the
tunable.

Reviewed by:	imp
2007-05-16 23:42:04 +00:00
Warner Losh
4b3337405d Change PCIM_CIS_ASI_TUPLE to _CONFIG.
Add PCI_MAX_BAR_0
minor style nit.
Add PCIM_CIS_CONFIG_MASK
2007-05-16 18:42:38 +00:00
Warner Losh
7a528f5c2e Add some doxygen docs for pci_cfg_{save,restore}. 2007-05-16 18:41:42 +00:00
John Baldwin
f11825148f Fix a typo in a bootverbose printf.
MFC after:	3 days
Submitted by:	yongari
2007-05-07 18:29:37 +00:00
John Baldwin
e706f7f0c7 Revamp the MSI/MSI-X code a bit to achieve two main goals:
- Simplify the amount of work that has be done for each architecture by
  pushing more of the truly MI code down into the PCI bus driver.
- Don't bind MSI-X indicies to IRQs so that we can allow a driver to map
  multiple MSI-X messages into a single IRQ when handling a message
  shortage.

The changes include:
- Add a new pcib_if method: PCIB_MAP_MSI() which is called by the PCI bus
  to calculate the address and data values for a given MSI/MSI-X IRQ.
  The x86 nexus drivers map this into a call to a new 'msi_map()' function
  in msi.c that does the mapping.
- Retire the pcib_if method PCIB_REMAP_MSIX() and remove the 'index'
  parameter from PCIB_ALLOC_MSIX().  MD code no longer has any knowledge
  of the MSI-X index for a given MSI-X IRQ.
- The PCI bus driver now stores more MSI-X state in a child's ivars.
  Specifically, it now stores an array of IRQs (called "message vectors" in
  the code) that have associated address and data values, and a small
  virtual version of the MSI-X table that specifies the message vector
  that a given MSI-X table entry uses.  Sparse mappings are permitted in
  the virtual table.
- The PCI bus driver now configures the MSI and MSI-X address/data
  registers directly via custom bus_setup_intr() and bus_teardown_intr()
  methods.  pci_setup_intr() invokes PCIB_MAP_MSI() to determine the
  address and data values for a given message as needed.  The MD code
  no longer has to call back down into the PCI bus code to set these
  values from the nexus' bus_setup_intr() handler.
- The PCI bus code provides a callout (pci_remap_msi_irq()) that the MD
  code can call to force the PCI bus to re-invoke PCIB_MAP_MSI() to get
  new values of the address and data fields for a given IRQ.  The x86
  MSI code uses this when an MSI IRQ is moved to a different CPU, requiring
  a new value of the 'address' field.
- The x86 MSI psuedo-driver loses a lot of code, and in fact the separate
  MSI/MSI-X pseudo-PICs are collapsed down into a single MSI PIC driver
  since the only remaining diff between the two is a substring in a
  bootverbose printf.
- The PCI bus driver will now restore MSI-X state (including programming
  entries in the MSI-X table) on device resume.
- The interface for pci_remap_msix() has changed.  Instead of accepting
  indices for the allocated vectors, it accepts a mini-virtual table
  (with a new length parameter).  This table is an array of u_ints, where
  each value specifies which allocated message vector to use for the
  corresponding MSI-X message.  A vector of 0 forces a message to not
  have an associated IRQ.  The device may choose to only use some of the
  IRQs assigned, in which case the unused IRQs must be at the "end" and
  will be released back to the system.  This allows a driver to use the
  same remap table for different shortage values.  For example, if a driver
  wants 4 messages, it can use the same remap table (which only uses the
  first two messages) for the cases when it only gets 2 or 3 messages and
  in the latter case the PCI bus will release the 3rd IRQ back to the
  system.

MFC after:	1 month
2007-05-02 17:50:36 +00:00
John Baldwin
361cf3bd02 Use more specific local variable pointers to narrow some expressions.
MFC after:	1 week
2007-05-02 16:21:18 +00:00
John Baldwin
d68b1825b7 - HT 2.00b added a new flag to the MSI mapping HT capability to indicate
that the MSI mapping window is fixed at 0xfee00000 and the capability
  does not include two more dwords used to program the address.  Supporting
  this mostly results in quieting spurious warnings during boot about
  non-default MSI mapping windows.
- HT 2.00b also added a new HT capability type, so support that in pciconf.

MFC after:	3 days
Tested by:	jmg
2007-04-25 14:45:46 +00:00