This finish (almost) the clocks implementations for the RK3328 SoC.
The clocks are now correctly implemented respecting the clock hiearchy.
The missing clocks are mostly the DDR clocks, implementing those is only
useful for debugging as we will never set them in the kernel.
The ARMCLK still needs to be rewritten so it looks closer to how the
hardware is done.
Tested-on: Rock64
Some clocks in the RK3328 SoC (and possibly others) have registers not in
the CLKSEL_CON range. Add a macros for muxes which lives not in the range
of CLKSEL_CON which just takes a raw offset.
When ntpd is synchronizing the system time, it also periodically (30m)
syncs the the RTC time. Remove printf in rk805_settime which triggers
every 30m, as settime_task_func() will log errors under bootverbose.
We leave the RTC Read logging, which should happen only once at boot.
Commit message by: imp
Reviewed by: manu, imp
MFC after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D30361
Nanopi4 based SoCs (NanoPC-T4, NanoPi M4*, and NanoPi Neo4) have
assigned-clock* in the pcie_phy node. Handle them but only fail
in case clk_set_assigned() returns an error other than
"no assigned-clock*" (as it would for all other SoCs).
Reviewed by: manu
MFC After: 2 weeks
Differential Revision: https://reviews.freebsd.org/D30363
o Fix slave address setting.
This allows to read the EDID from an HDMI monitor.
Reviewed by: manu
Sponsored by: UKRI
Differential Revision: https://reviews.freebsd.org/D27139
By default name the gpio P<bank><bankpin>
This make it easier to find the gpio when reading schematics or DTS.
Sponsored by: Diablotin Systems
Differential Revision: https://reviews.freebsd.org/D30287
It's a class0 driver that implements some pcib methods and creates
a pci bus as its children.
The "ofw_pci" name will be used by a new driver that will be a subclass
of the pci bus.
No functional changes intended.
Submitted by: Kornel Duleba <mindal@semihalf.com>
Reviewed by: andrew
Obtained from: Semihalf
Sponsored by: Alstom Group
Differential Revision: https://reviews.freebsd.org/D30226
While the xin32k clk was implemented in rk3399_cru as a fixed rate
clock, migrate it to rk805 as we will also need the 2nd clock
'rtc_clko_wifi' for SDIO and BT.
Both clocks remain fixed rate, and while the 1st one is always on
(though that is not expressed in the clk framework), the 2nd one
we can toggle on/off.
Reviewed-by: manu
Tested-by: manu
MFC-after: 2 weeks
Differential Revision: https://reviews.freebsd.org/D26870
Implement a driver for the RTC embedded in the RK805/RK808 power
management system used for RK3328 and RK3399 SoCs.
Based on experiments on my RK808, setting the time doesn't alter the
internal/inaccessible sub-second counter, therefore there's no point
in calling clock_schedule().
Based on an earlier revision by andrew.
Reviewed by: manu
Differential Revision: https://reviews.freebsd.org/D22692
Sponsored by: Google
MFC after: 1 week
- Add I2S and CODEC clocks to CRU driver
- Add support for gate selection to frac clock
- Add setfreq support to mux clock
Reviewed by: manu
Differential Revision: https://reviews.freebsd.org/D27831
Due to a HW bug in the RockChip PCIe implementation, attempting to access
a non-existent register in the configuration space will throw an exception.
Use new bus functions bus_peek() and bus_poke() to overcomme this limitation.
- Do not rely on U-Boot for clocks configuration, enable and set frequencies
in the driver's attach method.
- Adjust MAC settings according to detected linespeed on RK3399 and RK3328.
- Add support for RMII PHY mode on RK3328.
Reviewed by: manu
Differential Revision: https://reviews.freebsd.org/D26006
Ethernet clocks on RK3328 are controlled by SYSCON registers, so add
RK_CLK_COMPOSITE_GRF flag to indicate that clock node should access grf
registers instead of CRU's
Reviewed by: manu
Differential Revision: https://reviews.freebsd.org/D25918
For 1000Mb mode to work reliably TX/RX delays need to be configured
between the TX/RX clock and the respective signals on the PHY
to compensate for differing trace lengths on the PCB.
Reviewed by: manu
MFC after: 1 week
By using DWC TRM terminology, normal descriptor format should be named
extended and alternate descriptor format should be named normal.
Should not been functional change.
MFC after: 4 weeks
Don't set initial voltage for regulators having their voltage already
in allowed range. As side effect of this change, we don't try to set
initial voltage for fixed voltage regulators - these don't have impemented
voltage set method so their initialization has always failed.
MFC after: 3 weeks
- always initialize selector of voltage signaling standard.
Various versions of U-boot leaves voltage signaling standard settings
for PMUIO2 domain in different state. Always initialize it
into expected state.
- start the driver as early as possible, the IO domains should be
initialized before other drivers are attached.
- rename RK3399 register to its name founds in TRM.
This is the second part of fixes for serial port corruption observed after
DT 5.6 import.
Reviewed by: manu
MFC after: 1 week
Store the attached regulator in a tailq to later find them in ofw_map.
While here, do not attempt to attach a regulator without a name, a node
might exists but if it doesn't have a name the regulator is unused.
MFC after: 1 month
If pin is switched from fixed function to GPIO, it should have prepared
direction, pull-up/down and default value before function gets switched.
Otherwise we may produce unwanted glitch on output pin.
Right order of drive strength settings is questionable, but I think that
is slightly safer to do it also before function switch.
This fixes serial port corruption observed after DT 5.6 import.
MFC after: 1 week
The TSADC familiy is a little bit more complex than V2 and V3.
Early revision do not use syscon and do not use qsel (RK3288).
Next revision still do not use syscon but uses qsel (RK3328).
Final revision use both.
Submitted by: peterj
MFC after: 1 month
r357614 added CTLFLAG_NEEDGIANT to make it easier to find nodes that are
still not MPSAFE (or already are but aren’t properly marked).
Use it in preparation for a general review of all nodes.
This is non-functional change that adds annotations to SYSCTL_NODE and
SYSCTL_PROC nodes using one of the soon-to-be-required flags.
Approved by: kib (mentor, blanket)
Differential Revision: https://reviews.freebsd.org/D23635
If a regulator is already enabled, do not set its value to the minimum
supported on the board.
This fixes booting on rock64 where we set some regulator to the minimal value
while the IPs needs more based on what the bootloader configured.
MFC after: 1 week
This method will set the desired voltaged based on values in the DTS.
It will not enable the regulator, this is the job of either a consumer
or regnode_set_constraint SYSINIT if the regulator is boot_on or always_on.
Reviewed by: mmel
MFC after: 1 month
Differential Revision: https://reviews.freebsd.org/D23216
The gpio controller in rockchips SoC in a child of the pinctrl driver
and cannot control pullups and pulldowns.
Use the new fdt_pinctrl interface for accessing pin capabilities and
setting them.
We can now report that every pins is capable of being IN or OUT function
and PULLUP PULLDOWN.
If the pin isn't in gpio mode no changes will be allowed.
Reviewed by: ganbold (previous version)
MFC after: 1 month
Differential Revision: https://reviews.freebsd.org/D22849
The two switch regulator are always 3.0V.
Add a special case in get_voltage that if min=max we directly
return the value without calculating it.
Reviewed by: mmel
Differential Revision: https://reviews.freebsd.org/D23004
This driver configure the registers in the GRF according to the value
of the regulators for the platform.
Some IP can run with either 3.0V or 1.8V, if we don't configure them
correctly according to the external voltage used they will not work.
It's only done at boot time for now and might be needed at runtime for
IP like sdmmc.
Reviewed by: mmel
Tested On: RockPro64, Firefly-RK3399 (gonzo), AIO-3288 (mmel)
MFC after: 1 month
Differential Revision: https://reviews.freebsd.org/D22854
The RK808 driver was missing the LDO and switch regulators.
Add support for them.
Reviewed by: mmel
MFC after: 1 month
Differential Revision: https://reviews.freebsd.org/D22852
The maxpin counter starts at 0, fix one by one error.
This is still not totally correct for some banks in some SoC that have
fewer pins but this will be dealt with in another commit.
MFC after: 3 days
r351187 change the SYSCON_WRITE to SYSCON_MODIFY but didn't changed the
mask variable that used to hold the bitmask in the upper 16 bits of the
register that control which bits are changed. So we ended up clearing
bit from the upper 16bits half which are always 0 after a read.
Use the correct bit mask for bits that we want to clear.
MFC after: 3 days
Unfortunately, there are some limitations:
- memory aperture of his controller is only 16MiB, so it is nearly
unusable for graphic cards
- every attempt to generate type 1 config cycle always causes trap.
These config cycles are disabled now and we don't support cards
with PCIe switch.
- in some cases, attempt to do config cycle to (probably) not-yet ready
card also causes trap. This cannot be detected at runtime, but it seems
like very rare issue.
MFC after: 3 weeks
Differential Revision: https://reviews.freebsd.org/D22724
Only bank 0 and bank 2 are different than other rockchip SoC, fix this.
While here remove some debug printfs that where added in r355648
MFC after: 3 days
X-MFC-With: r355648
