Allow chipset drivers to specify the direct-mapped DMA window's mask in
preparation for tsunami support. Previous chipsets' direct-mapped DMA
mask was always 1024*1024*1024. The Tsunami chipset needs it to be
2*1024*1024*1024
Reviewed by: Doug Rabson <dfr@nlsystems.com>
preparation for tsunami support. Previous chipsets' direct-mapped DMA
mask was always 1024*1024*1024. The Tsunami chipset needs it to be
2*1024*1024*1024
These changes should not affect the i386 port
Reviewed by: Doug Rabson <dfr@nlsystems.com>
- Clear the IFF_OACTIVE flag when al_txeof() runs down the last TX mbuf chain.
- Mark the workaround for the transmitter stalling bug with
#ifdef AL_TX_STALL_WAR/#endif.
only support 'mirroring' the vendor and device ids, so we don't
lose any information. Certain revisions of the aic7880 will not
perform the mirroring so to match all possiblities would double
the number of table entries. This change also allows us to match
things like the 2944B which I missed in the original table.
This is an old OPTi chipset.
If you use a Bt878 card with this chipset, be sure to enable
the SIS/VIA chipset compatiblity mode workaround.
Tested By: Ben Laurie <ben@algroup.co.uk>
SIS/VIA/ OPTi chipset PCI bus workarounds.
These make the Bt878/879 chips stabler on certain
older and non-intel motherboards.
Use options BKTR_430_FX_MODE
or options BKTR_SIS_VIA_MODE
to enable these modes.
Also rename 849 to 849A
in the transmit code: the TX descriptor ring, and a 'shadow' ring of mbuf
pointers, one for each TX descriptor. When transmitting a packet that
consists of several fragments in an mbuf chain, we link each fragment
to a descriptor in the TX ring, but we only save a pointer to the mbuf
chain. This pointer is saved in the shadow ring entry which corresponds
to the first fragment in the packet. Later, ti_txeof() can release the
whole chain with a single m_freem() call. (We need the second ring to
keep track of the virtual addresses of the mbuf chains.)
The problem with this is that the Tigon isn't actually through with the
mbuf chain until it reaches the last fragment (which has the TI_BDFLAG_END
bit set), however the current scheme releases the mbuf chain as soon as
the first fragment is consumed. This is wrong, since the mbufs can then
be yanked out from under the Tigon and modified before the other fragments
can be transmitted.
The fix is to make a one line change to ti_encap() so that it saves the
mbuf chain pointer in the shadow ring entry that corresponds to the last
fragment in TX ring instead of the first. This prevents the mbufs from
being released until the last fragment is transmitted.
Painstakingly diagnosed and fixed by: Robert Picco <picco@mail.wevinc.com>
Brought to my attention by: dg
driver lacks error recovery and still needs more testing, but it's
about time I got it under revision control.
Submitted by: Tekram Inc.
Bus Space/DMA and cleanup: gibbs
ADMtek AL981 "Comet" chipset. The AL981 is yet another DEC tulip clone,
except with simpler receive filter options. The AL981 has a built-in
transceiver, power management support, wake on LAN and flow control.
This chip performs extremely well; it's on par with the ASIX chipset
in terms of speed, which is pretty good (it can do 11.5MB/sec with TCP
easily).
I would have committed this driver sooner, except I ran into one problem
with the AL981 that required a workaround. When the chip is transmitting
at full speed, it will sometimes wedge if you queue a series of packets
that wrap from the end of the transmit descriptor list back to the
beginning. I can't explain why this happens, and none of the other tulip
clones behave this way. The workaround this is to just watch for the end
of the transmit ring and make sure that al_start() breaks out of its
packet queuing loop and waiting until the current batch of transmissions
completes before wrapping back to the start of the ring. Fortunately, this
does not significantly impact transmit performance.
This is one of those things that takes weeks of analysis just to come
up with two or three lines of code changes.
The specific intent of this commit is to pave the way for importing
Compaq XP1000 support. These changes should not affect the i386 port.
Reviewed by: Doug Rabson <dfr@nlsystems.com>
(actually, he walked me through most of it & deserves more than reviewd-by
credit )
Change Intel GPIO mask to hopefully stop turning the Intel Camera off
Fixed tuner selection on Hauppauge card with tuner 0x0a
Replaced none tuner with no tuner for Theo de Raadt <deraadt@openbsd.org>.
Ivan Brawley <brawley@internode.com.au> added
the Australian channel frequencies.
Sync up device Ids with the master Adaptec list.
Add probe support for the 2940 Pro although it isn't obvious that
all of the termination support is correct for this adapter yet.
driver to use bus_space_read_foo()/bus_space_write_foo(). The line is not
visible unless you compile the driver to use PCI memory mapped mode, which
not done by default, but it should be fixed anyway.
displace a real driver.
Revert rev 1.109.
Pick up a few things from elsewhere (a couple of SiS id's).
As an *experiment*, have the chip* driver claim (for reporting purposes)
IDE controllers if there isn't another PCI-aware ide or ata driver to
grab them. I've exported the match function since it could be used from
the ata-all.c code replacing ata_pcimatch() - but I have not touched the
ata code. I'd like to catch a few more devices this way, including USB
and other bridges etc.
after some of the previous commits). Add in support for the 1240
dual channel ISP card. Try the dance of unmapping a PCI interrupt
if we don't configure (if that ever works it'll be helpful).
bttv's audio mux values.
Automatically locate the EEPROM i2c address and read the subsystem_vendor_id
from EEPROM and not the PCI registers.
Add NSMBUS checks around smbus/iicbus i2c bus code
Add GPIO mask for the audio mux to each card type.
Add CARD_ZOLTRIX and CARD_KISS from mailing list searches.
Tested by: Paul Reece <paul@fastlane.net.au>,
Ivan Brawley <brawley@internode.com.au> and
Gilad Rom <rom_glsa@ein-hashofet.co.il>
was available to the programmer to hold chip state information:
Use the SDID register instead of CTEST3. This change actually
simplifies the SCRIPTS code, but I'm not absolutely sure, that
it is OK for all variants of NCR chips around and all device
combinations. I have had this code running on several systems
with 53c810, 875 and 895 controllers for several months.
Suggested by: Gerard Roudier <groudier@club-internet.fr>
#define COMPAT_PCI_DRIVER(name,data) DATA_SET(pcidevice_set,data)
.. to 2.2.x and 3.x if people think it's worth it. Driver writers can do
this if it's not defined. (The reason for this is that I'm trying to
progressively eliminate use of linker_sets where it hurts modularity and
runtime load capability, and these DATA_SET's keep getting in the way.)
interrupt configuration reported. (I just discovered my vga card is
being configured for irq 5... :-) This is just reporting. The vga_isa
driver does the real work using the isa compat mappings.
