Commit Graph

9 Commits

Author SHA1 Message Date
Marius Strobl
4b7ec27007 - There's no need to overwrite the default device method with the default
one. Interestingly, these are actually the default for quite some time
  (bus_generic_driver_added(9) since r52045 and bus_generic_print_child(9)
  since r52045) but even recently added device drivers do this unnecessarily.
  Discussed with: jhb, marcel
- While at it, use DEVMETHOD_END.
  Discussed with: jhb
- Also while at it, use __FBSDID.
2011-11-22 21:28:20 +00:00
Juli Mallett
610803e3f5 Initialize PCIe buses and add preliminary support for 64-bit BARs. 2011-01-11 02:37:58 +00:00
Juli Mallett
4ad7c12b2c Don't attach the PCI bus driver if the board we're being run on has PCIe. The
two are mutually-exclusive on Octeon.
2010-11-03 23:29:52 +00:00
Juli Mallett
62f24c60ef Give devices lots of time to settle around programming BARs and command
registers.  Without this, the settings do not seem to stick for Atheros NICs in
the PCI slot of the Lanner MR-320.
2010-09-27 20:35:40 +00:00
Juli Mallett
a71199dab4 o) Program the Lanner MR-320 for 32-bit mode, too.
o) Give a virtual address for I/O ports on n64.
o) On the Portwell CAM-0100, return the right IRQ for the on-board SATA.
o) Except on bridges, only set PORTEN and MEMEN on devices that have I/O or
   memory BARs respectively.
o) Disable PORTEN and MEMEN while reprogramming BARs.
o) On the Lanner MR-955, set the Tx DMA power register for the on-board Promise
   SATA controller.
2010-09-27 20:12:57 +00:00
Juli Mallett
a4f7e65822 o) Add bus_teardown_intr for pci and ciu. This allows the Promise SATA
driver to try to switch interrupt handlers at setup.  It's not a very
   good implementation of bus_teardown_intr, though.
o) Set cache line size and latency timers for PCI devices per Linux.
2010-09-24 02:41:52 +00:00
Juli Mallett
3032f6daa2 Flesh out PCI bus support some:
o) Reset and configure the bus from scratch rather than expecting U-Boot to
   do it for us.  Values and configuration from Linux, U-Boot and comments
   in the Cavium Simple Executive sources.
o) Do a resource assignment and bus numbering pass in the absence of a PCI
   BIOS or firmware that will do it for us.
   XXX This has to be the third or fourth instance of this in FreeBSD and
       it would be nice to have it become part of the PCI bus driver itself,
       like it is on Linux.
o) Fix interrupt mapping for and adjust bus configuration for the Lanner
   MR-955, based on information provided by Lanner.
2010-09-24 00:14:24 +00:00
Juli Mallett
c0b690401a Fix to specify generic bus_add_child. 2010-09-19 09:18:27 +00:00
Juli Mallett
cea2b8b915 Update the port of FreeBSD to Cavium Octeon to use the Cavium Simple Executive
library:
o) Increase inline unit / large function growth limits for MIPS to accommodate
   the needs of the Simple Executive, which uses a shocking amount of inlining.
o) Remove TARGET_OCTEON and use CPU_CNMIPS to do things required by cnMIPS and
   the Octeon SoC.
o) Add OCTEON_VENDOR_LANNER to use Lanner's allocation of vendor-specific
   board numbers, specifically to support the MR320.
o) Add OCTEON_BOARD_CAPK_0100ND to hard-wire configuration for the CAPK-0100nd,
   which improperly uses an evaluation board's board number and breaks board
   detection at runtime.  This board is sold by Portwell as the CAM-0100.
o) Add support for the RTC available on some Octeon boards.
o) Add support for the Octeon PCI bus.  Note that rman_[sg]et_virtual for IO
   ports can not work unless building for n64.
o) Clean up the CompactFlash driver to use Simple Executive macros and
   structures where possible (it would be advisable to use the Simple Executive
   API to set the PIO mode, too, but that is not done presently.)  Also use
   structures from FreeBSD's ATA layer rather than structures copied from
   Linux.
o) Print available Octeon SoC features on boot.
o) Add support for the Octeon timecounter.
o) Use the Simple Executive's routines rather than local copies for doing reads
   and writes to 64-bit addresses and use its macros for various device
   addresses rather than using local copies.
o) Rename octeon_board_real to octeon_is_simulation to reduce differences with
   Cavium-provided code originally written for Linux.  Also make it use the
   same simplified test that the Simple Executive and Linux both use rather
   than our complex one.
o) Add support for the Octeon CIU, which is the main interrupt unit, as a bus
   to use normal interrupt allocation and setup routines.
o) Use the Simple Executive's bootmem facility to allocate physical memory for
   the kernel, rather than assuming we know which addresses we can steal.
   NB: This may reduce the amount of RAM the kernel reports you as having if
       you are leaving large temporary allocations made by U-Boot allocated
       when starting FreeBSD.
o) Add a port of the Cavium-provided Ethernet driver for Linux.  This changes
   Ethernet interface naming from rgmxN to octeN.  The new driver has vast
   improvements over the old one, both in performance and functionality, but
   does still have some features which have not been ported entirely and there
   may be unimplemented code that can be hit in everyday use.  I will make
   every effort to correct those as they are reported.
o) Support loading the kernel on non-contiguous cores.
o) Add very conservative support for harvesting randomness from the Octeon
   random number device.
o) Turn SMP on by default.
o) Clean up the style of the Octeon kernel configurations a little and make
   them compile with -march=octeon.
o) Add support for the Lanner MR320 and the CAPK-0100nd to the Simple
   Executive.
o) Modify the Simple Executive to build on FreeBSD and to build without
   executive-config.h or cvmx-config.h.  In the future we may want to
   revert part of these changes and supply executive-config.h and
   cvmx-config.h and access to the options contained in those files via
   kernel configuration files.
o) Modify the Simple Executive USB routines to support getting and setting
   of the USB PID.
2010-07-20 19:25:11 +00:00