The MIPS assembly parser treats forward-declared local symbols as global
symbols. This results in CALL16 relocations being used against local
(private) symbols which then fail to resolve when linking binaries.
Add .local to force the init and fini functions to be treated as local as
a workaround.
Submitted by: sbruno
Sponsored by: DARPA / AFRL
If unwinding stops due to hitting the end of the call chain, the return
value is supposed to be _URC_END_OF_STACK; other values indicate internal
errors. The return value from get_eit_entry() is now returned without
translating it to _URC_FAILURE, so that callers can see _URC_END_OF_STACK
when it happens.
When raising an exception, the unwinder searches for a catch handler and if
none is found it should invoke std::terminate() with the uncaught exception
as the "current" exception. Before this change, the terminate handler was
invoked with no exception as current (abi::__cxa_current_exception_type()
returned NULL), because the return value from the unwinder indicated an
internal failure in unwinding. It turns out that was because all errors
from get_eit_entry() were translated to _URC_FAILURE. Now the error is
returned untranslated, which allows _URC_END_OF_STACK to percolate upwards
to throw_exception() in libcxxrt. When it sees that return status it
properly calls std::terminate() with the uncaught exception installed
as the current exception, allowing custom terminate handlers to work
with it.
(to match official RISC-V target for GCC 7.1).
This is only a minimal config required to build c start up (csu).
This fixes build after r322429 ("Make _TO_CPUARCH macro for
ARCH to CPUARCH conversions")
Reported by: lwhsu
Sponsored by: DARPA, AFRL
This is no-op and only for reference: the S/390 port seems to be elusive
in the BSDs so it is convenient to keep some trace from past efforts.
It is likely newer attempts will focus on a newer toolchain using clang
instead.
Obtained from: Perforce depot/projects/s390
In real GNU libgcc, _Unwind_Backtrace is published with GCC_3.3 version
for all architectures but ARM. For ARM it's publishes with GCC_4.3.0
version.
This exception is not implement in your version of libggc, thus we
export _Unwind_Backtrace with bad version. To maintain backward
compatibility, publish _Unwind_Backtrace twice, once as compatible
symbol with GCC_3.3 version, and once as default symbol with
GCC_4.3.0 version.
While I'm in, fix typo in GCC_4.2.0 to GCC_4.3.0 inheritance declaration.
MFC after: 2 weeks
In r208737 jmallett@ added support for the "mips64r2" architecture
and "octeon" CPU, and the saa/saad instructions.
Upstream binutils also added the "octeon+" CPU, and the saa/saad
instructions are only available in octeon+, not octeon. Since our
base system tool chain already accepts saa/saad with -march=octeon,
just allow octeon+ as an alias.
This allows the use of octeon+ in kernel config files, for use with both
external tool chain and in-tree GCC/binutils.
PR: 216516
MFC after: 1 month
Sponsored by: The FreeBSD Foundation
Summary:
The Freescale e500v2 PowerPC core does not use a standard FPU.
Instead, it uses a Signal Processing Engine (SPE)--a DSP-style vector processor
unit, which doubles as a FPU. The PowerPC SPE ABI is incompatible with the
stock powerpc ABI, so a new MACHINE_ARCH was created to deal with this.
Additionaly, the SPE opcodes overlap with Altivec, so these are mutually
exclusive. Taking advantage of this fact, a new file, powerpc/booke/spe.c, was
created with the same function set as in powerpc/powerpc/altivec.c, so it
becomes effectively a drop-in replacement. setjmp/longjmp were modified to save
the upper 32-bits of the now-64-bit GPRs (upper 32-bits are only accessible by
the SPE).
Note: This does _not_ support the SPE in the e500v1, as the e500v1 SPE does not
support double-precision floating point.
Also, without a new MACHINE_ARCH it would be impossible to provide binary
packages which utilize the SPE.
Additionally, no work has been done to support ports, work is needed for this.
This also means no newer gcc can yet be used. However, gcc's powerpc support
has been refactored which would make adding a powerpcspe-freebsd target very
easy.
Test Plan:
This was lightly tested on a RouterBoard RB800 and an AmigaOne A1222
(P1022-based) board, compiled against the new ABI. Base system utilities
(/bin/sh, /bin/ls, etc) still function appropriately, the system is able to boot
multiuser.
Reviewed By: bdrewery, imp
Relnotes: yes
Differential Revision: https://reviews.freebsd.org/D5683
Bring older verbatim version of cpuid.h
This file is used regularly in FreeBSD builds but we usually use the
similar file provided by clang.
By providing the older file introduced in GCC 4.3, we hope to mimic
better what is provided by an external toolchain.
Obtained from: GCC-4_3-branch (SVN rev. 129548, pre GPLv3)
llvm libunwind includes a libunwind.cpp, but on ARM libunwind.S is found
first in .PATH. Rename the latter one, since it is not going to be
updated again.
Reviewed by: andrew
MFC after: 3 days
Sponsored by: The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D7162
This is required to build csu.
Reviewed by: andrew
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
Differential Revision: https://reviews.freebsd.org/D5039
This will result in __ARM_ARCH_7A__ being defined during the compile.
When compiling with gcc, it will still only generate armv6 opcodes itself,
but should pass the arch to gas so that inline asm can use v7 opcodes.
the first argument of the following builtin function:
* __builtin_ia32_psrlqi128() takes __v2di instead of __v4si
This should fix the following errors when building the graphics/webp
port with base gcc:
lossless_sse2.c:403: error: incompatible type for argument 1 of '__builtin_ia32_psrlqi128'
lossless_sse2.c:404: error: incompatible type for argument 1 of '__builtin_ia32_psrlqi128'
Reported by: Jos Chrispijn <ports@webrz.net>
MFC after: 3 days
From the OpenBSD log:
x86-64 ABI requires arrays greater than 16 bytes to be aligned to
16byte boundary. However, GCC 16-byte aligns arrays of >=16 BITS,
not BYTES.
This diff improves bug detectability for code which has local arrays
of [16 .. 127] bits: in those cases SSP will now detect even 1-byte
overflows.
Obtained from: OpenBSD (CVS rev 1.4)
MFC after: 1 week
Very small updates: fixes GCC-PR target/31152
Tested by building the cross-compiler.
Obtained from: gcc 4.3 (rev. r118461, 125973: GPLv2)
MFC after: 2 weeks
following builtin functions:
* __builtin_ia32_pslldi128() takes __v4si instead of __v8hi
* __builtin_ia32_psllqi128() takes __v2di instead of __v8hi
* __builtin_ia32_psradi128() takes __v4si instead of __v8hi
This should fix the following errors when building the LINT kernel with
gcc:
sys/crypto/aesni/aesni_wrap.c:191: error: incompatible type for argument 1 of
'__builtin_ia32_psradi128'
sys/crypto/aesni/aesni_wrap.c:195: error: incompatible type for argument 1 of
'__builtin_ia32_pslldi128'
MFC after: 3 days
Bring The following revisions from the gcc43 branch[1]:
118360, 118361, 118363, 118576, 119820,
123906, 125246, and 125721.
They all have in common that the were merged long ago
into Apple's gcc and should help improve the general
quality of the compiler and make it easier to bring
new features from Apple's gcc42.
For details please review the additions to the files:
gcc/ChangeLog.gcc43
gcc/cp/ChangeLog.gcc43 (new, adds previous revisions)
Reference:
[1] http://gcc.gnu.org/viewcvs/gcc/trunk/?pathrev=126700
Obtained from: gcc pre4.3 (GPLv2) branch
MFC after: 3 weeks
-maes option, but not the -mpclmul option as I ran out of bits in
the 32 bit flags field... You can -D__PCLMUL__ to get this, but it
won't be compatible w/ clang and modern gcc...
Reviewed by: -current, -toolchain
Initial support for the AMD amdfam10 chipsets has been available in the
gcc43 branch under GPLv2. AMD and some linux distributions (OpenSUSE) did
a backport of the amdfam10 support and made it available.
This is a revised subset of the support initially brought in in r236962
and later reverted. The collateral efects seem to have disappeared but
it is still recommended to set the CPUTYPE with caution.
Reviewed by: jkim (ages ago)
MFC after: 3 weeks
_Unwind_ForcedUnwind in libgcc_s takes as one of it's parameters a stop
function to tell it when to stop unwinding. One of the stop function's
parameters is a _Unwind_Exception_Class. On most architectures this is an
int64_t, however on ARM EABI the gcc developers have made this a char array
with 8 items. While both of these take the same space they are passed into
the stop function differently, an int64_t is passed in in registers r2 and
r3, while the char[8] is passed in as a pointer to the first item in
register r2.
Because libthr expects the value to be an int64_t we would get incorrect
results when it passes a function that take an int64_t but libgcc passes in
a pointer to a char array including crashing.
The fix is to update libgcc_s to make it pass an int64_t to the stop
function and to libstdc++ as it expects _Unwind_Exception_Class to be an
array.
ARM EABI support is disabled by default and can be enabled by setting
WITH_ARM_EABI when building, however only the kernel-toolchain target will
work with this flag until the rest of the support is added.
built with clang. When these are defined the lists are defined similar to:
asm(".section .ctors");
STATIC func_ptr __CTOR_LIST__[1] = { (func_ptr) (-1) };
asm(".section .dtors");
STATIC func_ptr __DTOR_LIST__[1] = { (func_ptr) (-1) };
The problem is clang will move the two arrays out of the .ctors and .dtors
sections causing these sections to contain a single null address. By not
defining these macros we use the version of the code that places the arrays
is their sections by using __attribute__((section(".ctors"))) and similar
for .dtors.
Submitted by: Daisuke Aoyama <aoyama AT peach.ne.jp>
