PCI device(s), changes:
- alloc_entry() now clears bit for page slot entry aswell
- update of cmd->ent_arr[] is now under cmd->alloc_lock
- complete command if alloc_entry() fails
MFC after: 1 week
Sponsored by: Mellanox Technologies
By default reading the diagnostic counters is disabled. The firmware
decides which counters are supported and only those supported show up
in the dev.mce.X.diagnostics sysctl tree.
To enable reading of diagnostic counters set one or more of the
following sysctls to one:
dev.mce.X.conf.diag_general_enable=1
dev.mce.X.conf.diag_pci_enable=1
MFC after: 1 week
Sponsored by: Mellanox Technologies
consistent return values from the mlx5e_sq_has_room_for()
function. The two counters are incremented by different threads under
different locks.
MFC after: 1 week
Sponsored by: Mellanox Technologies
register, in addition to configuring it as input with the pinmux driver.
There was a control register bit commented as "no desc in datasheet". A
later revision of the manual reveals the bit to be an input/output control
for the timer pin. In addition to configuring capture or pulse mode, you
apparently have to separately configure the pin direction in the timer
control register.
Before this change, the timer block was apparently driving a signal onto a
pad configured by pinmux as input. Capture mode still accidentally worked
for me during testing because I was using a very strong signal source that
just out-muscled the weaker drive from the misconfigured pin.
* allocate an ext bit for fragment offload. Some NICs (like the ath10k
hardware in native wifi or 802.3 mode) support doing packet fragmentation
in firmware/hardware, so we don't have to do it here.
* allocate an ext bit for VHT and start using it.
* Although the hardware is awake, the power state handling doesn't think so.
So just explicitly wake it up early in setup so ath_hal calls don't complain.
* We shouldn't be transmitting or ACKing frames during DFS CAC or on passive
channels before we hear a beacon. So, start laying down comments in the
places where this work has to be done.
Note:
* The main bit missing from finishing this particular bit of work is a state
call to transition a VAP from passive to non-passive when a beacon is heard.
CAC is easy, it's an interface state. So, I'll go and add a method to control
that soon.
all of them in terms of an sbuf-based back-end, xpt_path_sbuf. This
unifies the implementation, but more importantly it stops the output
fropm being split between 4 or more invocations of printf. The
multiple invocations cause interleaving of the messages on the
console during boot, making the output of disk discovery often
unintelligible. This change helps a lot, but more work is needed.
Reviewed by: ken, mav
Sponsored by: Netflix
Commit r312747 ("Setup decoding windows for ARMADA38X") resulted
in build failing for Marvell platforms, which don't have AHCI controller.
This patch provides a fix by adding dummy functions for such cases.
On the occasion rename register dump routine to decode_win_ahci_dump,
in order to avoid confusion.
Submitted by: Marcin Wojtas <mw@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
- Replace pcpu_find(curcpu) with get_pcpu(), which is much
more direct.
- Remove armv4 pcpu fields which I added in r286296 but never
needed to use.
- armv6 pc_qmap_addr was leftover from the old armv6 pmap
implementation. Rename it and put it to use in the new one.
Noted by: skra
Reviewed by: skra
MFC after: 1 week
Differential Revision: https://reviews.freebsd.org/D9312
under a shared read lock. This patch attempts to upgrade the lock to
an exclusive write lock. If the exclusive write lock fails to be
obtained, the current fragment is not placed at the head of the list.
This portion of the patch was inspired by NetBSD ip_frag.c r1.4 (which
effectively removed the section of code that performed the reordering).
The patch to sys/contrib/ipfilter/netinet/ip_compat.h adds the
MUTEX_TRY_UPGRADE macro to support the patch to ip_frag.c.
The patch to contrib/ipfilter/lib/rwlock_emul.c supports this patch
by emulating the mutex in userspace when exercised by ipftest(1).
Inspired by: NetBSD ip_frag.c r1.4
MFC after: 1 month
This calls ioctl() handlers for the different interfaces in the bridge.
These handlers expect to get called in an ioctl context where it's safe
for them to sleep. We may not sleep with the bridge lock held.
However, we still need to protect the interface list, to ensure it
doesn't get changed while we iterate over it.
Use BRIDGE_XLOCK(), which prevents bridge members from being removed.
Adding bridge members is safe, because it uses LIST_INSERT_HEAD().
This caused panics when adding xen interfaces to a bridge.
PR: 216304
Reviewed by: ae
MFC after: 1 week
Sponsored by: RootBSD
Differential Revision: https://reviews.freebsd.org/D9290
(intentionally) deleted first and then completely added again (so all the
events, announces and hooks are given a chance to run).
This cause an issue with CARP where the existing CARP data structure is
removed together with the last address for a given VHID, which will cause
a subsequent fail when the address is later re-added.
This change fixes this issue by adding a new flag to keep the CARP data
structure when an address is not being removed.
There was an additional issue with IPv6 CARP addresses, where the CARP data
structure would never be removed after a change and lead to VHIDs which
cannot be destroyed.
Reviewed by: glebius
Obtained from: pfSense
MFC after: 2 weeks
Sponsored by: Rubicon Communications, LLC (Netgate)
Taking closer look on my ASM1062 I found that it has bunch of issues around
error recovery: reported wrong CCS, failed commands reported as completed,
READ LOG EXT times out after NCQ error. This patch workarounds first two
problems, that were making ATAPI devices close to unusable on these HBAs.
MFC after: 2 weeks
In r263232 sys/capability.h was renamed to sys/capsicum.h, to avoid
conflicts with a capability.h header found on other operating systems.
Sponsored by: The FreeBSD Foundation
success and a good value. Only then try to use it and set the MSIX_ENABLE
bit.
With the current em(4) driver we have observed failures in this case in a
specific environment when pci_find_cap() would not return the assumed
value, which meant we ended up writing to PCI register 2 (PCI_DEVICE_ID)
which is read-only.
PR: 216456
Submitted by: bz
This file provides support for AHCI mode on Armada38x
and adds new optional AHCI device to arm/mv/files.mv.
Submitted by: Konrad Adamczyk <ka@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Reviewed by: zbb
Differential revision: https://reviews.freebsd.org/D9222
It occurred that some Marvell integrated controllers
require additional time after soft reset to work properly.
Introduce new quirk (AHCI_Q_MRVL_SR_DEL), that enable
such operation.
Submitted by: Konrad Adamczyk <ka@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Reviewed by: mav
Differential revision: https://reviews.freebsd.org/D9221
It is necesarry to open memory windows on internal bus for
AHCI driver to work correctly.
Submitted by: Konrad Adamczyk <ka@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Reviewed by: zbb
Differential revision: https://reviews.freebsd.org/D9220
Configure decoding windows only for devices with
enabled nodes in FDT.
Submitted by: Konrad Adamczyk <ka@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Reviewed by: zbb
Differential revision: https://reviews.freebsd.org/D9219
method
Method could be used before we can access device_t structure.
As per simple phandle_t handle we can access FDT to check
if specified node has been enabled.
It will be used in Marvell's common configuration code.
Submitted by: Konrad Adamczyk <ka@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Reviewed by: zbb, meloun-miracle-cz
Differential revision: https://reviews.freebsd.org/D9218
Adding SHA256 support to Marvell crypto driver resulted in regression
for older SoC's, not capable of handling this mode in hardware.
Submitted by: Emeric Poupon <emeric.poupon@stormshield.eu>
Obtained from: Stormshield
Sponsored by: Stormshield
Reviewed by: zbb
Differential revision: https://reviews.freebsd.org/D9215
This commit introduces following changes in order to get rid of
ifdef's from all around the driver.
* Introduce sc_soc_id field in cesa_softc structure - this value is
obtained in cesa_attach() anyway, so make use of it.
* Replace ifdefs with SoC ID checks.
* Perform PM control status only for relevant SoC's.
Submitted by: Marcin Wojtas <mw@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Reviewed by: zbb
Differential revision: https://reviews.freebsd.org/D9247
Marvell Armada 38x is supported in 3 variants,
so take all into consideration in crypto driver
attach routine.
Submitted by: Marcin Wojtas <mw@semihalf.com>
Obtained from: Semihalf
Sponsored by: Stormshield
Reviewed by: zbb
Differential revision: https://reviews.freebsd.org/D9248
