Allow chipset drivers to specify the direct-mapped DMA window's mask in
preparation for tsunami support. Previous chipsets' direct-mapped DMA
mask was always 1024*1024*1024. The Tsunami chipset needs it to be
2*1024*1024*1024
Reviewed by: Doug Rabson <dfr@nlsystems.com>
preparation for tsunami support. Previous chipsets' direct-mapped DMA
mask was always 1024*1024*1024. The Tsunami chipset needs it to be
2*1024*1024*1024
These changes should not affect the i386 port
Reviewed by: Doug Rabson <dfr@nlsystems.com>
only support 'mirroring' the vendor and device ids, so we don't
lose any information. Certain revisions of the aic7880 will not
perform the mirroring so to match all possiblities would double
the number of table entries. This change also allows us to match
things like the 2944B which I missed in the original table.
commands are outstanding. You'd think they'd just clear the IDLE bit,
but alas, no. Delay until all pending mailbox commands have completed
in aha_cmd to work around this.
Report sync rates correctly on Fast Adaptec cards. Clones may still be
reported incorrectly since there is no documenation on how they report
extended sync values.
Clean up some unused fields in the aha softc.
SIS/VIA/ OPTi chipset PCI bus workarounds.
These make the Bt878/879 chips stabler on certain
older and non-intel motherboards.
Use options BKTR_430_FX_MODE
or options BKTR_SIS_VIA_MODE
to enable these modes.
Also rename 849 to 849A
in the transmit code: the TX descriptor ring, and a 'shadow' ring of mbuf
pointers, one for each TX descriptor. When transmitting a packet that
consists of several fragments in an mbuf chain, we link each fragment
to a descriptor in the TX ring, but we only save a pointer to the mbuf
chain. This pointer is saved in the shadow ring entry which corresponds
to the first fragment in the packet. Later, ti_txeof() can release the
whole chain with a single m_freem() call. (We need the second ring to
keep track of the virtual addresses of the mbuf chains.)
The problem with this is that the Tigon isn't actually through with the
mbuf chain until it reaches the last fragment (which has the TI_BDFLAG_END
bit set), however the current scheme releases the mbuf chain as soon as
the first fragment is consumed. This is wrong, since the mbufs can then
be yanked out from under the Tigon and modified before the other fragments
can be transmitted.
The fix is to make a one line change to ti_encap() so that it saves the
mbuf chain pointer in the shadow ring entry that corresponds to the last
fragment in TX ring instead of the first. This prevents the mbufs from
being released until the last fragment is transmitted.
Painstakingly diagnosed and fixed by: Robert Picco <picco@mail.wevinc.com>
Brought to my attention by: dg
manager and prevented IOPort allocation beyond the first EISA slot from
working. subr_rman.c should have trapped this on the way into the system
rather than tripping over the wreckage.
Head banged into wall repeatedly by: "Matthew N. Dodd" <winter@jurai.net>
Honor the 'bus reset at startup' option now that the XPT properly
handles transfer negotiation in this scenario.
Honor the sync rate settings on Ultra2 controllers. We would
always negotiate at the fastest speed. Oops.
aic7xxx.h:
Whitespace.
aic7xxx.seq:
Fix a minor nit that would cause the controller to miss the update
of the negotiation required bitmask causing the negotiation to
be delayed by a command.
driver lacks error recovery and still needs more testing, but it's
about time I got it under revision control.
Submitted by: Tekram Inc.
Bus Space/DMA and cleanup: gibbs
- Mention that the 6Mbps turbo adapters are supported in HARDWARE.TXT
and RELNOTES.TXT and the wi.4 man page
- Mention turbo adapters in the wicontrol.8 man page and provide a
complete table of available transmit speed settings
Implement priorities.
GENERIC, LINT, files:
Remove remarks about ordering of device names.
GENERIC, LINT:
Sort the devices alphabetically in LINT and GENERIC.
The specific intent of this commit is to pave the way for importing
Compaq XP1000 support. These changes should not affect the i386 port.
Reviewed by: Doug Rabson <dfr@nlsystems.com>
(actually, he walked me through most of it & deserves more than reviewd-by
credit )
Fixed problems:
LS120/ZIP drives still currupted data.
Reworked once again, buffered I/O is just ignoring any sizehints
it is given :(
Now the atapifd driver splits up requests for devices that has
limitted transfer size.
ISA only configs fails on boot with interrupt timeouts.
The new-bus integration introduced a bug where the softc ptr
was lost during the probe.
Some minor cleanups and rearrangements as well.
As usual USE AT YOUR OWN RISK!!, this is still pre alpha level code.
Especially the DMA support can hose your disk real bad if anything
goes wrong, again you have been warned :)
Notebook owners should be carefull that their machines dont suspend
as this might cause trouble...
But please tell me how it works for you!
Enjoy!
motherboard will have a card for the "motherboard" on slot 0.
eisa0: <EISA bus> on motherboard
mainboard0: <ASU5101 (System Board)> at slot 0 on eisa0
This should stop the probe "detecting" an EISA bus everywhere that has
a 'controller eisa0' line regardless of whether it's really there.
Change Intel GPIO mask to hopefully stop turning the Intel Camera off
Fixed tuner selection on Hauppauge card with tuner 0x0a
Replaced none tuner with no tuner for Theo de Raadt <deraadt@openbsd.org>.
Ivan Brawley <brawley@internode.com.au> added
the Australian channel frequencies.
Clean up the handling of failure modes in our attach so we don't free
resources twice. ahc_free() will do all of the work for us (as would
be required by an unload event) so we only need to handle resources that
the softc has not taken ownership of.
Fixed problems:
LS120 drives currupted data.
The workaround for drives not supporting upto 64K transfers
has been reworked. It works now both on LS120 & ZIP drives.
ISA only configs wont compile.
Fixed.
The ATA driver wont share interrupts.
Fixed.
The "unwanted interrupt" warning gave wrong controller.
Another lun<>unit messup from the newbus integration.
Some minor cleanups and rearrangements as well.
As usual USE AT YOUR OWN RISK!!, this is still pre alpha level code.
Especially the DMA support can hose your disk real bad if anything
goes wrong, again you have been warned :)
Notebook owners should be carefull that their machines dont suspend
as this might cause trouble...
But please tell me how it works for you!
Enjoy!
-Søren
docs don't seem to shed light on why this is needed, but reports from
the field indicate this helps prevent problems in this area. Ken's
changes seem to have exposed this bug, rather than caused it, as far
as I can tell.
Thanks to Jack O'Neill for tracking this down.
Submitted by: jack@germanium.xtalwind.net
Very strong 3.2 merge candidate.
Sync up device Ids with the master Adaptec list.
Add probe support for the 2940 Pro although it isn't obvious that
all of the termination support is correct for this adapter yet.
tell the sequencer to pause itself for a target msg variable update. This
avoids the pause race entirely as HS_MAILBOX can be accessed without
pausing the chip.
3.2 Merge candidate.
