driver for CAM ATA subsystem. This driver supports same hardware as
atamarvell, ataadaptec and atamvsata drivers from ata(4), but provides
many additional features, such as NCQ, PMP, etc.
- device initiated power management (some devices support only this way);
- Automatic Partial to Slumber Transition (more power saving);
- DMA auto-activation (expected to slightly improve performance).
More features could be added later, when hardware supports.
This bug would cause allocating sample-mode PMCs to fail with ENOMEM after allocating several counting-mode PMCs.
Approved by: jkoshy (mentor)
MFC after: 2 weeks
that generates a fatal bus trap. Normally, the chips are setup to do
128 byte DMA bursts, but when on this CPU, they can only safely due
4-byte DMA bursts due to this bug. Details of the exact nature of the
bug are sketchy, but some can be found at
https://forum.openwrt.org/viewtopic.php?pid=70060 on pages 4, 5 and 6.
There's a small performance penalty associated with this workaround,
so it is only enabled when needed on the Atheros AR71xx platforms.
Unfortunately, this condition is impossible to detect at runtime
without MIPS specific ifdefs. Rather than cast an overly-broad net
like Linux/OpenWRT dues (which enables this workaround all the time on
MIPS32 platforms), we put this option in the kernel for just the
affected machines. Sam didn't like this aspect of the patch when he
reviewed it, and I'd love to hear sane proposals on how to fix it :)
Reviewed by: sam@
does. Without this change, Yukon Extreme seems to generate lots of
RX FIFO overruns even though controller has available RX buffers.
These excessive RX FIFO overruns generated lots of pause frames
which in turn killed devices plugged into switch. It seems there is
still occasional RX frame corruption on Yukon Extreme but this
change seems to fix the pause frame storm.
Reported by: jhb
Tested by: jhb
MFC after: 5 days
- Print device details only when verbose boot is enabled.
- Add debug output for shared memory access.
- Add debug statistics (checksum offload & VLAN frame counters).
- Modify TX path to update consumer index for each frame completed
rather than updating the consumer index only once for a group of
frames to improve small packet performance.
- Print driver/firmware pulse messages only when verbose boot
is enabled.
- Add debug sysctl to clear statistics.
- Fix more style(9) violations.
MFC after: 2 weeks
architecture from page queue lock to a hashed array of page locks
(based on a patch by Jeff Roberson), I've implemented page lock
support in the MI code and have only moved vm_page's hold_count
out from under page queue mutex to page lock. This changes
pmap_extract_and_hold on all pmaps.
Supported by: Bitgravity Inc.
Discussed with: alc, jeffr, and kib
controller, I'm not sure whether this is also applicable to SiS190
so this feature is only activated on SiS191 controller.
In theory, controller reinitialization is not needed when VLAN tag
configuration is changed, but xclin said controller was not stable
whenever toggling VLAN tag bit. To address that, sge(4)
reinitialize controller for VLAN configuration which seems to work
as expected. VLAN tag information for TX/RX descriptor and
configure bit of RxMacControl register was found by xclin.
Submitted by: xclin <xclin <> cs dot nctu dot edu dot tw > (initial version)
Tested by: xclin <xclin <> cs dot nctu dot edu dot tw >
register. Due to lack of SiS190 controller, I'm not sure whether
this is also applicable to SiS190 so this feature is only activated
on SiS191 controller.
The controller can pad 10 bytes before DMAing a received frame to
RX buffer and received bytes include the padded bytes. This padding
is very useful on strict-alignment architectures because driver
does not have to copy received frame to align IP header on 4 bytes
boundary. It also gives better RX performance on non-strict
alignment architectures. Special thanks to xclin to give me
valuable register information. Without his enthusiastic trial and
errors this wouldn't be even possible.
While I'm here tighten validity check of received frame. Controller
clears RDS_CRCOK bit when it received bad CRC frames. xclin found
that using loop back testing.
Tested by: xclin <xclin <> cs dot nctu dot edu dot tw >
programs RX filter configuration. It seems RX MAC control register
is one of key registers to get various offloading features as well
as performance. Blindly clearing unrelated bits can result in
unexpected results.
Tested by: xclin <xclin <> cs dot nctu dot edu dot tw >
emulated by BIOS using SMI interrupt. On those chipsets reading
from the status port may be thousand times slower than usually.
Sometimes this emilation is not working properly resulting in
commands timing out and since we assume that inb() operation
takes very little time to complete we need to adjust number of
retries to keep waiting time within a designed limits (100ms).
Measure time it takes to make read_status() call and adjust
number of retries accordingly.
To keep it simple, use TSC to measure inb() performance and
keep it to amd64-only, since TSC may not available on older
CPUs.
Also enable detection of the AT controller absence on amd64.
Reviewed by: jhb
MFC after: 1 month
back in rxeof (I could see little point in taking it out),
and now release it before the stack entry.
Also, make it so the 82574 does not configure for multiqueue
when its not used in the stack.
On top of that, LLVM+Clang mis-compiles this code because of its register
allocator bug.
Analyzed by: Andrew Reilly (areilly at bigpond dot net dot au)
Reviewed by: ariff, rdivacky
MFC after: 3 days
In the end, it does help fixing /dev/io usage from multithreaded
processes.
- On i386 and amd64 the old behaviour is kept but multithreaded
processes must use the new interface in order to work well.
- Support for the other architectures is greatly improved, where
necessary, by the necessity to define very small things now.
Manpage update will happen shortly.
Sponsored by: Sandvine Incorporated
PR: threads/116181
Reviewed by: emaste, marcel
MFC after: 3 weeks
Open Firmware device tree in order to match what the PROM built-in
driver uses. This is especially important when netbooting Fujitsu
Siemens PRIMEPOWER250 as in that case the built-in driver isn't used
and the port facts PortSCSIID defaults to 0, conflicting with the
disk at the same address.
first descriptor in TSO case. Otherwise controller can generate bad
frames during TSO. To address it, make sure to pull up ethernet +
IP + TCP header with options in first buffer. Also ensure the
buffer length of the first descriptor for TSO covers entire ethernet
+ IP + TCP with options and setup additional Tx descriptor if the
first buffer includes TCP payload.
Tested by: Amar Takhar <verm <> darkbeer dot org >
MFC after: 1 week
Some of these cases should be safe in a non-atomic fashion, however
since all of the driver ioctls are locked, a lot of work is required to
fix it correctly. Just don't sleep now.
MFC after: 2 weeks
was chosen by lots of trial and errors. The chosen value shows
good interrupt moderation without additional latency.
Without this change, controller can generate more than 140k
interrupts per second under high network load.
Submitted by: xclin <xclin <> cs dot nctu dot edu dot tw >
This time, abandon the use of busdma and start interacting with the VM
system directly. Make use of the new kmem_alloc_attr() which allows us
to easily allocate non-contiguous pages to back the GART table. This
should help a lot when starting or restarting X after the system has
been running for a while and memory has become fragmented.
MFC after: 2 weeks
* On 32 bit platforms we steal the upper 4 bits of the map handle
to store a unique map id.
* On 64 bit platforms we steal the upper 24 bits.
Resolves issues where the offsets that are handed to mmap may overlap the VRAM on some cards.
Tested on: radeon, intel, mga, and via.
This will break nouveau. I will spin new patches shortly.
