2922 Commits

Author SHA1 Message Date
Luiz Otavio O Souza
2566c5264a Add support to turn off Beaglebone with poweroff(8) or shutdown(8) -p.
To cut off the power we need to start the shutdown sequence by writing
the OFF bit on PMIC.

Once the PMIC is programmed the SoC needs to toggle the PMIC_PWR_ENABLE
pin when it is ready for the PMIC to cut off the power.  This is done by
triggering the ALARM2 interrupt on SoC RTC.

The RTC driver only works in power management mode which means it won't
provide any kind of time keeping functionality.  It only implements a way
to trigger the ALARM2 interrupt when requested.

Differential Revision:	https://reviews.freebsd.org/D1489
Reviewed by:	rpaulo
MFC after:	2 weeks
2015-01-12 03:23:16 +00:00
Ian Lepore
244fe94f3b Handle dma mappings with more than one segment for rpi sdhci.
The driver inherently does dma in 512 byte chunks, but it's possible that
such a buffer can span two physically discontiguous pages (such as when
a userland program does IO on the raw /dev/mmcsdN devices).  Now the driver
can handle a buffer that's split across two pages.

It could in theory handle any number of segments now, but as long as IO is
being done in 512 byte blocks it will never need more than two.
2015-01-12 02:42:33 +00:00
Ian Lepore
740a7a7597 Enable ALT_BREAK_TO_DEBUGGER for rpi. 2015-01-12 02:29:23 +00:00
Ian Lepore
bf160401a9 Check for and handle failures of bus_dmamap_load(). The driver currently
requires that each 512 byte IO be in a single contiguous buffer, but if a
buffer crosses a page boundary and the physical pages aren't contiguous
you can get an EFBIG failure (too many segments).

The driver really should handle multiple segment IO, but before adding that
I wanted to make sure that it's handling failure properly while the failure
is easily recreatable.
2015-01-11 21:27:46 +00:00
Ian Lepore
bffed0e9c8 Store the shadow command/mode register in the softc, not a local static var.
Submitted by:	Michal Meloun
2015-01-11 17:00:24 +00:00
Andrew Turner
3f53a2d612 Rename gic_init_secondary to arm_init_secondary_ic to help with the merge
of the arm_intrng project branch.
2015-01-11 16:46:43 +00:00
Andrew Turner
c9ac548c01 Rework the GIC driver to ease the import of the arm_intrng branch. The
common code has been pulled out to static functions.
2015-01-11 10:26:49 +00:00
Warner Losh
c4765af73f Add infrastructure to build dtb files from dts files. 2015-01-08 18:28:06 +00:00
Ian Lepore
9326d90f0e Move the inclusion of cpu-v6.h inside the #ifdef _KERNEL block, so that
userland programs (which probably don't actually need machine/cpu.h) compile.
2015-01-08 03:59:03 +00:00
Ian Lepore
8a474d01ee Add accessors for the ARM CP15 performance monitor registers. Also ensure
that some #ifdef SMP code is also conditional on __ARM_ARCH >= 7; we don't
support SMP on armv6, but some drivers and modules are compiled with it
forced on via the compiler command line.
2015-01-08 01:28:46 +00:00
Luiz Otavio O Souza
60245f5103 Fix the handling of pull-up and pull-down for RK3188.
For this to work the driver needs to know the bank it has attached to since
the registers for the first 12 pins are at a different location.

Move the lock initialization to simplify the code.
2015-01-07 19:15:11 +00:00
Luiz Otavio O Souza
1c15a29600 Reduce the maximum number of pins for the Rockchip RK3188, this driver
isn't supposed to manage all the GPIO pins in the system from a single
instance, instead it will attach to each one of the four available GPIO
controllers and only deal with one bank at time (32 pins per bank).

Rework part of the driver to take advantage of that, this simplify the
code a lot.

Also fix a bug in rk30_gpio_get_function() which wouldn't return the
correct values.

While here fix a typo in register name.
2015-01-07 16:55:55 +00:00
Mark Johnston
bdb9ab0dd9 Factor out duplicated code from dumpsys() on each architecture into generic
code in sys/kern/kern_dump.c. Most dumpsys() implementations are nearly
identical and simply redefine a number of constants and helper subroutines;
a generic implementation will make it easier to implement features around
kernel core dumps. This change does not alter any minidump code and should
have no functional impact.

PR:		193873
Differential Revision:	https://reviews.freebsd.org/D904
Submitted by:	Conrad Meyer <conrad.meyer@isilon.com>
Reviewed by:	jhibbits (earlier version)
Sponsored by:	EMC / Isilon Storage Division
2015-01-07 01:01:39 +00:00
John Baldwin
3e32dff52c Remove "New" label from NFSCL/NFSD now that they are the only NFS
client/server.  While here, remove duplicate NFSCL from sys/conf/NOTES.

Approved by:	rmacklem
2015-01-06 16:15:57 +00:00
Hans Petter Selasky
b217d18412 Add 64-bit DMA support in the XHCI controller driver.
- Fix some comments and whitespace while at it.

MFC after:	1 month
Submitted by:	marius@
2015-01-05 20:22:18 +00:00
Ian Lepore
fbf1ef4849 Switch all arm kernels with option SMP to use SCHED_ULE instead of 4BSD. 2015-01-03 23:57:03 +00:00
Ian Lepore
dad0c32719 Remove commented-out options SMP and APIC_IO from old arm boards that will
never be able to support smp.
2015-01-03 23:30:29 +00:00
Ian Lepore
7e55f8c198 Add a new trap-v6.c which has support for all armv7 exceptions. This
mostly paves the way for the new pmap code, and shouldn't result in any
noticible behavior differences.

Submitted by: Svatopluk Kraus <onwahe@gmail.com>,
              Michal Meloun <meloun@miracle.cz
2015-01-03 22:33:18 +00:00
Ian Lepore
301e1601ad Fix alignment directives in arm asm code after clang 3.5 import.
The ancient gas we've been using interprets .align 0 as align to the
minimum required alignment for the current section.  Clang's integrated
assembler interprets it as align to a byte boundary.  Fortunately both
assemblers interpret a non-zero value as align to 2^N so just make sure
we have appropriate non-zero values everywhere.
2015-01-02 23:46:26 +00:00
Ed Maste
942c32333e Update ELF headers to include additional defines
The elftoolchain project includes these additional defines for various
userland programs. Given that arch-specific defines are still interesting
in the context of userland programs reading or writing ELF metadata, they
should be included in top-level ELF headers.

Remove duplicate defines from ARM and MIPS elf headers.

Submitted by:	will (initial version)
Reviewed by:	imp, will
Sponsored by:	The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D844
2015-01-02 15:36:29 +00:00
Ruslan Bukin
e5df85ca42 Add driver for general-purpose I/O (GPIO).
Sponsored by:	DARPA, AFRL
2015-01-02 13:15:36 +00:00
Ian Lepore
67009184e3 Remove -Wa,-march=armv7a from arm kernel configs, it makes clang 3.5 sad
and apparently isn't needed now that we're using the integrated assembler.
2015-01-01 23:21:46 +00:00
Ian Lepore
54f9ec883d Define a WFI macro that expands to the right form of wait-for-interrupt
depending on the architecture.
2015-01-01 23:18:37 +00:00
Ian Lepore
bd96d0895e Rework the vpf support code so that it compiles with clang 3.4, 3.5, and gcc.
Michal Meloun did most of the hard work in figuring out what would work with
which compiler, I just reformated things a bit before committing.
2015-01-01 23:15:52 +00:00
Warner Losh
7ed11c5e5a Fix module builds on arm (and maybe others) by turning off a whole
raft of new warnings that appear to be on by default in clang 3.5.0.
Fix RPI-B build issues with new clang not liking the ability to pass
arbitrary flags to as, since some flags are more arbitrary (and thus
verboten) than others.

These warnings should be actually fixed in the code, but this is a
band-aide to get things (almost) building again.
2015-01-01 02:00:04 +00:00
Ian Lepore
490341147e A couple small fixes to make clang 3.5 happy... Move END(sigcode) to the
end of the actual instruction sequence for the function but before some
misc data in the text segment.  This eliminates a strange "size must be
constant" error from the integrated assembler.  Also, the build_pagetables
function was missing an END(), but really the problem is that it shouldn't
have an ASENTRY() because it's not a function that needs to be a global
symbol with unwind info and all, it's just a little private subroutine
used in very early kernel init.
2014-12-31 16:15:43 +00:00
Ian Lepore
9cb25d2d4c Change the order of operations for the initial cache setup. Turning off
the cache before clean/invalidate ensured that no new lines can come into
the cache or migrate between levels during the operation, but may not be
safe on some chips.  Instead, if the cache was enabled on entry, do the
wbinv while it's still enabled, and then disable it and do a separate
invalidate pass.  After the intitial writeback we know there are no
dirty lines left and no new dirty lines can be created as long as we
carefully avoid touching memory before turning the cache off.  Add a
comment about that so no new code gets inserted between those points.
2014-12-31 02:38:23 +00:00
Ian Lepore
3ed72a94a4 Fix a paste-o.
Submitted by:		Michal Meloun <meloun@miracle.cz>
2014-12-31 02:33:12 +00:00
Ian Lepore
952fc99936 Add a new locore.S that #includes the right (v4 or v6) implementation.
The kernel build machinery really wants the entry point to be in a file
named locore.S so doing this avoids a bunch of changes to the build system
for relatively little benefit.
2014-12-30 03:19:46 +00:00
Ian Lepore
dc15bc80b7 Rename locore.S to locore-v4.S and add a new locore-v6.S for starting up
armv6/7 systems.  We need to use some new armv6/7 features at startup
and splitting the implemenations to separate files will be more maintainable
than adding even more #ifdef sections to locore.S.

Because of the standardized interfaces to cache and MMU operations in armv7,
we can tolerate the kernel being entered with caches enabled.  This allows
running u-boot and loader(8) with caches enabled, and the performance
improvement can be dramatic (boot times can be cut from over a minute
to under 30 seconds).  The new implementation also has more robust cache
and mmu sequences for launching AP cores, and it paves the way for
upcoming changes to the pmap code which will use the TEX remap feature.

Changes in mp_machdep.c work with the new behavior in locore-v6 mp_entry,
and also reuse the original boot-time page tables to get transitioned
from physical to virtual addressing before installing the normal tables.

Submitted by Svatopluk Kraus and Michal Meloun with some changes by me.
2014-12-30 03:17:53 +00:00
Ian Lepore
10fe3ac09b Export MAXCPU to the assembler code, needing by upcoming changes to locore.S. 2014-12-30 02:58:34 +00:00
Ian Lepore
aaf2d0987e Add armv6 implementations of these cache operations to avoid duplicating
the #ifdef stuff at multiple points the functions are called from.  Also
rework the armv7 implementations so that the invalidate operations work
from outermost to innermost cache level, and the writeback works from
inner to outer levels.
2014-12-30 02:56:31 +00:00
Ian Lepore
782feef3f3 Update comments (r4 is not used anywhere), use non-profiling entry macros. 2014-12-28 21:33:41 +00:00
Ian Lepore
874d48dc8f Fix a "decl is not a prototype" error noticed by gcc (but not clang). 2014-12-28 19:05:32 +00:00
Ian Lepore
6c1d9637b7 Add cache maintenance functions which will be used by startup code to
initially set up the MMU.  Some day they may also be useful as part of
suspend/resume handling, when we get better at power management.

Submitted by: Svatopluk Kraus <onwahe@gmail.com>,
              Michal Meloun <meloun@miracle.cz
2014-12-28 18:38:25 +00:00
Ian Lepore
8d59f6c4da Eliminate an unused macro whose name clashes now with a function in the
new cpu-v6.h.  This should have been part of r276334.
2014-12-28 18:26:15 +00:00
Ian Lepore
518c6ac777 Add new TLB and cache maintainence functions for armv6 and armv7. These
are inline functions that handle all the routine maintenance operations
except the flush-all and invalidate-all routines which are required only
during early kernel init.

These inline functions should be very much faster than the old mechanism
that involved jumping through the big cpufuncs table, especially for
common operations such as invalidating a single TLB entry.  Note that
nothing is calling these yet, this just is just required infrastructure
for upcoming changes to the pmap-v6 code.
2014-12-28 18:19:05 +00:00
Ian Lepore
2b71562fd8 Add new code to read and parse cpu identification data using the new CPUID
mechanism defined for armv7 (and also present on some armv6 chips including
the arm1176 used on rpi).  The information is parsed into a global cpuinfo
structure, which will be used by (upcoming) new cache and tlb maintenance
code to handle cpu-specific variations of the maintence sequences.

Submitted by: Svatopluk Kraus <onwahe@gmail.com>,
              Michal Meloun <meloun@miracle.cz
2014-12-28 18:12:56 +00:00
Luiz Otavio O Souza
bb0a868b54 Remove unnecessary code and, instead, use the provided iicbus_null_callback
callback.
2014-12-27 20:06:16 +00:00
Luiz Otavio O Souza
f7f772808b Fix a off-by-one bug.
Pointy hat to:	loos
2014-12-27 19:56:04 +00:00
Luiz Otavio O Souza
9e93dfcf25 Convert the BSC (i2c) driver to use the new iicbus_get_frequency().
Tested on:	Raspberry pi
2014-12-27 18:54:39 +00:00
Luiz Otavio O Souza
09df4bfd8d Removes unused and duplicate headers.
Bring the wait limit on mailbox write to a more sane value.

Fix a off-by-one bug on wait time limit.

Remove extra blank line.
2014-12-27 15:13:25 +00:00
Luiz Otavio O Souza
abba73f295 Remove the '#undef DEBUG' that should not be committed. 2014-12-27 14:06:05 +00:00
Luiz Otavio O Souza
1432fa20f3 On interrupt handler, save the actual data read from mbox. The previous
macro wasn't needed and was being used with swapped arguments which always
give the same result (0) defeating the overflow check.

On initialization, do not use bcm_mbox_intr() to read the pending messages,
with the new semaphore based implementation this will lead to semaphore
being incremented on the channels that contain pending data and will make
the first read for that channel return stale data.

This fixes the hang that happens on boot while initializing the cpufreq on
Raspberry Pi.
2014-12-27 13:52:33 +00:00
Luiz Otavio O Souza
e9faba9d70 Make consistent use of the correct debug macros across the file. 2014-12-27 13:17:27 +00:00
Luiz Otavio O Souza
f2e44b6029 Fix the musb initialization sequence on AM335x.
According to http://e2e.ti.com/support/arm/sitara_arm/f/791/t/210729 the
USB reset pulse has an undocumented duration of 200ns and during this
period the module must not be acessed.

We wait for 100us to take into account for some imprecision of the early
DELAY() loop.

This fixes the eventual 'External Non-Linefetch Abort (S)' that happens at
boot while resetting the musb subsystem.

While here, enable the USB subsystem clock before the first access.

Discussed with: 	ian, adrian
MFC after:		2 weeks
2014-12-26 17:45:49 +00:00
Ian Lepore
efa8bab713 Include acle-compat.h directly (we use its symbols) rather than getting
it via sysreg.h.
2014-12-26 14:29:27 +00:00
Ian Lepore
2ed434b4bf Squelch a (bogus) gcc use-before-init warning. 2014-12-26 13:44:41 +00:00
Ian Lepore
c93be3714d Define only the CP15 register operations that are valid for the architecture.
Submitted by: Svatopluk Kraus <onwahe@gmail.com>,
              Michal Meloun <meloun@miracle.cz
2014-12-25 19:22:02 +00:00
Ian Lepore
eb4585bcc6 Add macros for asm barrier instructions with arch-specific implementations. 2014-12-25 19:08:39 +00:00