Commit Graph

2 Commits

Author SHA1 Message Date
Weongyo Jeong
a0585a1450 overhauls urtw(4) for supporting RTL8187B devices properly that there
was major changes to initialize RF chipset and set H/W registers and
removed a lot of magic numbers on code.  Details are as follows:

  - uses the endpoint 0x89 to get TX status information which used to
    get TX complete or retry numbers or get a beacon interrupt.  It's
    only valuable for RTL8187B.
  - removes urtw_write[8|16|32]_i functions that it's useless now.
  - uses ic->ic_updateslot to set SLOT, SIFS, DIES, EIFS, CW_VAL
    registers that doesn't set these whenever the channel is changed.
  - code for initializing RF chipset for RTL8187B changed a lot that
    there was many problems on TX transfers so it doesn't work properly
    even if just for a ping/pong.  Now it becomes more stable than
    before that TX throughputs using netperf(1) were about 15 ~ 17Mbps/s
    though sometimes it encounters packet losses.
  - removes a lot of magic numbers that in the previous all of
    representing RX and TX descriptors were consisted of magic numbers
    and structures.  It'd be more readable rather than before.
  - calculates TX duration more accurately for urtw(4) devices.
  - style(9)
2009-10-18 00:11:49 +00:00
Weongyo Jeong
f58ca84122 ports urtw(4) for USB2. Additionally it supports a 8187B chipset weakly
that it needs more stabilization.
2009-05-27 03:57:38 +00:00