Use the published compatible strings (our own invention, "ti,mmchs" is
still accepted as well, for now).
Don't blindly turn on 8-bit bus mode, because even though the conroller
supports it, the board has to be wired appropriately as well. Use the
published property (bus-width=<n>) and honor all the valid values (1,4,8).
The eMMC device on a Beaglebone Black is wired for 8-bit, update the dts.
The mmchs controller can inherently do both 1.8v and 3.0v on the first
device and 1.8v only on other devices, unless an external transceiver is
used. Set the voltage automatically for the first device and honor
the published fdt property (ti,dualvolt) for other devices.
Thanks go to Ilya Bakulin for figuring out the voltage compatibility stuff.
Right now, the semaphore write is scheduled after each batch, which is
not optimal and must be tuned.
Discussed with: alc
Tested by: pho
MFC after: 1 month
allocate memory and so not require sleepable environment. getenv() has
already used on-stack temporary storage, so just use it more rationally.
getenv_string() receives buffer as argument, so don't need another one.
The imx6.dtsi is incomplete, but has enough to support devices that work
right now. Eventually it will need to be split into several files that
account for the differences between SoCs in the imx6 family.
The board config for Wandboard Dual is untested. Solo and Quad work, but
one one core is turned on for the quad right now (baby steps).
outer and inner loop as 32-bit integers mux'd in 64-bit return
values. Change our data types for the count and stride to match
and simplify/adjust accordingly.
Note that with this change the defaults of the ptc.e parameters
have changed. Since all hardware is supposed to support the PAL
call, there should be no impact. Even ski is unaffected, because
the TC is re-initialized without considering the virtual address.
So, as long as we call ptc.e at least once, we're good. That's
what the new defaults do.
Most processor implementations need but a single ptc.e to purge
the entire TC anyway...
end, make pmap_invalidate_all() global and have it only handle the
local CPU -- i.e. no rendezvous. We do not use pmap_invalidate_all
other than during initialization.
Note that the BSP already purges its TC -- it was missing for APs
only. Nonetheless, this so far seems to eliminate random problems.
ia64_probe_sapics(), we also create PCPU structures for any Local SAPICs
we encounter. When SMP is disabled, this leaves us with partially setup
PCPU structures, which typically results in panics when we're iterating
over CPUs. When SMP is disabled, we now prevent the creation of the
PCPU structures.
and ordering related variables, fields and locks next to each
other. Add more comments to variables.
Over time 'ifnet' has accumlated a lot of additional pointers and
functionality in an unstructured way making it quite hard to read
and understand while obfuscating relationships between fields and
variables.
Quantify the structure size and how bloated it has become.
This is only a mechanical change in preparation for upcoming
work to make ifnet opaque to drivers and to separate out the
interface queuing.
Sponsored by: The FreeBSD Foundation
CDC=0 simply means "no command codes", CDC=1 means "AT command codes."
There's no driver change required! It's purely to tell the application
layer whether to speak AT commands or not. Things are all still serial.
PR: usb/183505
Reviewed by: hps
MFC after: 1 week
is not idential to "uint32_t" when defining set channel prototype
functions. The WLAN channel range should be from 0 to 65535
inclusivly, and u_int should be fine for this purpose.
threaded handlers.
It's not easy to see from the diffs of this change exactly how it
accomplishes the above. The arm_mask_irq() and arm_unmask_irq() functions
are, respectively, the pre_thread and post_thread hooks. Not seen in
these diffs, the arm_post_filter() routine also EOIs. The post_filter
routine runs after filter handlers if there will be no threaded handlers,
so it just EOIs. The pre_thread routine masks the interrupt (at the
controller, not the source) and EOIs. So one way or another, the EOI
happens at the point where filter handlers are done.
corresponding x86 trap type. Userland DTrace probes are currently handled
by the other fasttrap hooks (dtrace_pid_probe_ptr and
dtrace_return_probe_ptr).
Discussed with: rpaulo
the interrupt handler. If the event callback starts a new short timeout,
the timer can fire before returning from the event callback, and clearing
the interrupt status after that loses the interrupt and hangs until the
counter wraps. Fixing all of this removes the need for the do-nothing
loop at the top of the handler which really just waited for the counter to
roll over and reach the one-shot count again.
Also add a missing return(0) in the periodic timer start case.
For now, the AMRR code only knows about _either_ MCS or non-MCS rates.
It doesn't know how to downgrade (ie, doing 11b CCK rates if MCS0 isn't
reliable.)
PR: kern/183428
than one unit with four busses attached to it. This allows us to use
existing fdt data which describes separate devices with separate resources.
It also allows any combination of the units to be en/disabled in the
board dts files.
Adjust our dts code to match what's used by linux and u-boot now that
we're structured to do so.
Document lots of interesting stuff learned whiling doing this with a big
comment block in the driver, so I don't have to re-learn it for the next
round of changes.
