Commit Graph

119 Commits

Author SHA1 Message Date
Pyun YongHyeon
bbe2ca7533 Add initial BCM5719 support. TSO and jumbo frame was intentionally
disabled for BCM5719 A0 revision due to known hardware errata.
Many thanks to Broadcom for continuing support of FreeBSD.

Submitted by:	Geans Pin at Broadcom
2011-05-12 17:15:57 +00:00
Pyun YongHyeon
cb777a0752 Enable Ethernet@WireSpeed for BCM5718/BCM57765 family. While I'm
here inverse meaning of PHY flag as Ethernet@WireSpeed is enabled
for most PHYs.
2011-05-05 00:43:40 +00:00
Pyun YongHyeon
b4a256ac67 Add initial BCM57765 family support. The BCM57765 family seems to
have similar hardware features of BCM5718 family except the number
of receive return ring is 4. The BCM57765 family is known to
support IEEE 802.3az EEE(Energy Efficient Ethernet) but this change
does not include EEE support code. I hope EEE is implemented in
near future.
This change will support BCM57761, BCM57765, BCM57781, BCM57785,
BCM57791 and BCM57795. All hardware offloading features are
supported and suspend/resume also should work.
Many thanks to Broadcom for continuing support of FreeBSD.

Tested by:	Paul Thornton (prt <> prt dot org)
HW donated by:	Broadcom
2011-05-04 17:04:31 +00:00
Pyun YongHyeon
f5459d4cad Add initial jumbo frame support for BCM5714/BCM5715 and BCM5780.
Unlike other controllers which have more advanced jumbo support,
these controllers have one send ring, one standard receive producer
ring and one receive return ring. In order to receive jumbo frames
on the controllers, driver now will increase Rx buffer size to 9k.
Two Rx modes are supported on these controllers and I chose
standard Rx BDs over extended Rx BDs. The extended Rx BD mode
allows up to 4 segmentations for each Rx BDs such that kernel does
not have to allocate large buffer of contiguous memory for
receiving. The extended Rx BD mode is already used on controllers
that have separate jumbo receive ring. However, using extended Rx
BDs on BCM5714/BCM5715/BCM5780 reduces the number of Rx BDs to 256
entries which in turn may reduce the performance.  Also UMA backed
page allocator for jumbo frame returns contiguous memory so using
extended Rx BD has no advantage on FreeBSD unless highly customized
local allocator implemented in driver is used.
To use jumbo buffers in standard receive ring, Rx buffer allocation
handler was changed to allocate MJUM9BYTES sized mbuf.

PR:		kern/155192
Tested by:	Vijay Singh <vijju.singh <> gmail dot com>
Submitted by:	mjacob (initial version)
2011-04-05 17:41:54 +00:00
Pyun YongHyeon
1108273af4 Add initial BCM5718 family support. The BCM5718 family includes
the dual port BCM5717 and BCM5718 devices which are intended for
mainstream workstation and entry-level server designs and
represents the twelfth generation of NetXtreme Ethernet controllers.
This family is the successor to the BCM5714/BCM5715 family and
supports IPv4/IPv6 checksum offloading, TSO, VLAN hardware tagging,
jumbo frames, MSI/MSIX, IOV, RSS and TSS.

This change set supports all hardware features except IOV and
RSS/TSS. Unlike its predecessors, only extended RX buffer
descriptors can be posted to the jumbo producer ring. Single RX
buffer descriptors for jumbo frame are not supported. RSS requires
a more substantial set of changes and will apply to a larger set
of NetXtreme devices so RSS/TSS multi-queue support will be
implemented in a future releases.

Special thanks to Broadcom who kindly sent a sample board to me
and to davidch who gave provided the initial support code.

Submitted by:	davidch (initial version)
HW donated by:	Broadcom
2010-10-27 17:20:19 +00:00
Pyun YongHyeon
ca4f898699 Apply the same workaround for SDI flow control used on BCM5906 A1
to BCM6906 A0/A2. This should fix a long standing BCM5906 A2 lockup
issues. Data sheet explicitly mentions BCM5906 A0, A1 and A2 use
de-pipelined mode on these revisions.
Special thanks to Buganini who tried all combinations of
experimental patches for more than 10 days.

Tested by:	Buganini <buganini <> gmail dot com >
2010-10-23 21:25:50 +00:00
Pyun YongHyeon
8d5f71818f Add workaround for BCM5906 A1 controller silicon bug. When
auto-negotiation results in half-duplex operation, excess collision
on the ethernet link may cause internal chip delays that may result
in subsequent valid frames being dropped due to insufficient
receive buffer resources. The workaround is to choose de-pipeline
method as a flow control decision for SDI. De-pipeline method
allows only 1 data in TxMbuf at a time such that a request to RDMA
from SDI is made only when TxMbuf is empty. Thanks for david for
providing detailed errata information.
2010-10-22 19:30:56 +00:00
Pyun YongHyeon
f6a6548885 Enable TX MAC state machine lockup fix for both BCM5755 or higher
and BCM5906. Publicly available data sheet just says it may happen
due to corrupted TxMbuf.
2010-10-22 18:31:44 +00:00
Pyun YongHyeon
d598b626c0 Add workaround for BCM5906 controller silicon bug. If device
receive two back-to-back send BDs with less than or equal to 8
total bytes then the device may hang. The two back-to-back send
BDs must be in the same frame for this failure to occur.
Thanks to davidch for detailed errata information.

Reviewed by:	davidch
2010-10-19 23:04:23 +00:00
Marius Strobl
8e5d93dbb4 Convert the PHY drivers to honor the mii_flags passed down and convert
the NIC drivers as well as the PHY drivers to take advantage of the
mii_attach() introduced in r213878 to get rid of certain hacks. For
the most part these were:
- Artificially limiting miibus_{read,write}reg methods to certain PHY
  addresses; we now let mii_attach() only probe the PHY at the desired
  address(es) instead.
- PHY drivers setting MIIF_* flags based on the NIC driver they hang
  off from, partly even based on grabbing and using the softc of the
  parent; we now pass these flags down from the NIC to the PHY drivers
  via mii_attach(). This got us rid of all such hacks except those of
  brgphy() in combination with bce(4) and bge(4), which is way beyond
  what can be expressed with simple flags.

While at it, I took the opportunity to change the NIC drivers to pass
up the error returned by mii_attach() (previously by mii_phy_probe())
and unify the error message used in this case where and as appropriate
as mii_attach() actually can fail for a number of reasons, not just
because of no PHY(s) being present at the expected address(es).

Reviewed by:	jhb, yongari
2010-10-15 14:52:11 +00:00
Pyun YongHyeon
88a7c5d464 Remove bge_tx_buf_ratio, unused member of softc. 2010-10-06 17:47:13 +00:00
Pyun YongHyeon
a813ed787f Overhaul MII register access routine and remove unnecessary
BGE_MI_MODE register accesses. Previously bge(4) used to read
BGE_MI_MODE register to detect whether it needs to disable
autopolling feature or not. Because we don't touch autopolling in
other part of driver there is no reason to read BGE_MI_MODE
register given that we know default value in advance. In order to
achieve the goal, check whether the controller has CPMU(Central
Power Mangement Unit) capability. If controller has CPMU feature,
use 500KHz MII management interface(mdio/mdc) frequency regardless
core clock frequency. Otherwise use default MII clock. While I'm
here, add CPMU register definition.

In bge_miibus_readreg(), rearrange code a bit and remove goto
statement. In bge_miibus_writereg(), make sure to restore
autopolling even if MII write failed. The delay time inserted after
accessing BGE_MI_MODE register increased from 40us to 80us.

The default PHY address is now stored in softc. All PHYs supported
by bge(4) currently uses PHY address 1 but it will be changed when
we add newer controllers. This change will make it easier to change
default PHY address depending on PHY models.

Submitted by:	davidch
2010-10-06 17:35:27 +00:00
Pyun YongHyeon
757402fba0 Separate common flags into controller specific and PHY related
flags. There should be no functional changes. This change will make
it easy to add more quirk/flags in future.

Reviewed by:	davidch
2010-10-05 23:03:48 +00:00
Pyun YongHyeon
d255f2a9df Enable fix for read DMA FIFO overruns on controllers that have this
fix. Note, we still need workaround for controllers that lacks this
fix and it needs more work in RX BD updating.

Submitted by:	davidch
2010-10-04 18:09:01 +00:00
Pyun YongHyeon
7aa4b937e0 Allow write DMA to request larger DMA burst size to get better
performance on BCM5785.

Obtained from:	OpenBSD
2010-10-01 17:46:15 +00:00
Pyun YongHyeon
2280c16b56 Implement hardware MAC statistics for BCM5705 or newer Broadcom
controllers. bge(4) exported MAC statistics on controllers that
maintain the statistics in the NIC's internal memory. Newer
controllers require register access to fetch these values. These
counters provide useful information to diagnose driver issues.
2010-09-29 21:56:31 +00:00
Pyun YongHyeon
dedcdf574b Set the number of RX frames to receive after RX MBUF low watermark
has reached. This reduced number of dropped frames when
flow-control is enabled. Previously it dropped incoming frames once
RX MBUF low watermark has reached. The value used in MAC RX MBUF
low watermark is greater than or equal to 4 so receiving two more
RX frames should not be a problem.

Obtained from:	OpenBSD
2010-09-29 00:00:45 +00:00
Pyun YongHyeon
38cc61518b Handle PAE case correctly. You cannot effectively specify a 4GB
boundary in PAE case so use a 2GB boundary for PAE as suggested by
jhb.

Pointed out by:	jhb
Reviewed by:	jhb
2010-08-31 18:48:09 +00:00
Pyun YongHyeon
5b610048ec Split common parent DMA tag into ring DMA tag and TX/RX mbuf DMA
tag. All controllers that are not BCM5755 or higher have 4GB
boundary DMA bug. Previously bge(4) used 32bit DMA address to
workaround the bug(r199670). However this caused the use of bounce
buffers such that it resulted in poor performance for systems which
have more than 4GB memory. Because bus_dma(9) honors boundary
restriction requirement of DMA tag for dynamic buffers, having a
separate TX/RX mbuf DMA tag will greatly reduce the possibility of
using bounce buffers. For DMA buffers allocated with
bus_dmamem_alloc(9), now bge(4) explicitly checks whether the
requested memory region crossed the boundary or not.
With this change, only the DMA buffer that crossed the boundary
will use 32bit DMA address. Other DMA buffers are not affected as
separate DMA tag is created for each DMA buffer.
Even if 32bit DMA address space is used for a buffer, the chance to
use bounce buffer is still very low as the size of buffer is small.
This change should eliminate most usage of bounce buffers on
systems that have more than 4GB memory.

More correct fix would be teaching bus_dma(9) to honor boundary
restriction for buffers created with bus_dmamem_alloc(9) but it
seems that is not easy.

While I'm here cleanup bge_dma_map_addr() and remove unnecessary
member variables in bge_dmamap_arg structure.

Tested by:	marcel
2010-08-31 17:33:48 +00:00
Pyun YongHyeon
35f945cd62 It seems all Broadcom controllers have a bug that can generate UDP
datagrams with checksum value 0 when TX UDP checksum offloading is
enabled.  Generating UDP checksum value 0 is RFC 768 violation.
Even though the probability of generating such UDP datagrams is
low, I don't want to see FreeBSD boxes to inject such datagrams
into network so disable UDP checksum offloading by default.  Users
still override this behavior by setting a sysctl variable or loader
tunable, dev.bge.%d.forced_udpcsum.

I have no idea why this issue was not reported so far given that
bge(4) is one of the most commonly used controller on high-end
server class systems. Thanks to andre@ who passed the PR to me.

PR:	kern/104826
2010-08-22 01:39:09 +00:00
Pyun YongHyeon
caf088fc1f Use Miscellaneous Configuration Register bit definition instead of
magic number.
2010-07-15 23:34:58 +00:00
Pyun YongHyeon
77982948d1 Remove unused macros.
Reviewed by:	bde
2010-06-08 17:28:28 +00:00
Pyun YongHyeon
e0b7b101ce Fix a bug introduced in r199011. When bge(4) reuses loaded RX
buffers it should also reinitialize RX descriptors otherwise some
stale data could be passed to controller. This could end up with
mbuf double free or unexpected NULL pointer dereference in upper
stack. To fix the issue, save loaded buffer's length and
reinitialize RX descriptors with the saved value whenever bge(4)
reuses the loaded RX buffers.
While I'm here, increase the number of RX buffers to 512 from 256.
This simplifies RX buffer handling as well as giving more RX
buffers. Controller supports just fixed number of RX buffers
(i.e. 512) and bge(4) used to rely on hope that our CPU is fast
enough to keep up with the controller. With this change, bge(4)
will use 1MB for RX buffers but I don't think it would cause
problems in these days.

Reported by:	marcel
Tested by:	marcel
2010-06-05 23:29:24 +00:00
Pyun YongHyeon
ea3b412711 For controllers that has dual mode PHY(copper or fiber) interfaces
over GMII, make sure to enable GMII. With this change brgphy(4) is
used to handle the dual mode PHY. Since we still don't have a sane
way to pass PHY specific information to mii(4) layer special
handling is needed in brgphy(4) to determine which mode of PHY was
configured in parent interface.
This change make BCM5715S work.

Tested by:	olli
Obtained from:	OpenBSD
MFC after:	1 week
2010-01-14 19:08:43 +00:00
Xin LI
f7d1b2eb75 o Add PCI ID for BCM 5756.
o Don't enable BGE_FLAG_BER_BUG on both 5722 and 5756, and based
   on their PCI IDs rather than their chip IDs.

Reported by:	several PC-BSD users via kmoore
Reviewed by:	yongari, imp, jhb, davidch
Sponsored by:	iXsystems, Inc.
MFC after:	2 weeks
2010-01-13 22:39:39 +00:00
Pyun YongHyeon
beaa2ae169 Create sysctl node(dev.bge.%d.focred_collapse) instead of
hw.bge.forced_collapse. hw.bge.forced_collapse affects all bge(4)
controllers on system which may not desirable behavior of the
sysctl node. Also allow the sysctl node could be modified at any
time.

Reviewed by:	bde (initial version)
2009-12-08 17:54:23 +00:00
Pyun YongHyeon
ca3f1187f1 Implement TSO for BCM5755 or newer controllers. Some controllers
seem to require a special firmware to use TSO. But the firmware is
not available to FreeBSD and Linux claims that the TSO performed by
the firmware is slower than hardware based TSO. Moreover the
firmware based TSO has one known bug which can't handle TSO if
ethernet header + IP/TCP header is greater than 80 bytes. The
workaround for the TSO bug exist but it seems it's too expensive
than not using TSO at all. Some hardwares also have the TSO bug so
limit the TSO to the controllers that are not affected TSO issues
(e.g. 5755 or higher).
While I'm here set VLAN tag bit to all descriptors that belengs to
a frame instead of the first descriptor of a frame. The datasheet
is not clear how to handle VLAN tag bit but it worked either way in
my testing. This makes it simplify TSO configuration a little bit.

Big thanks to davidch@ who sent me detailed TSO information.
Without this I was not able to implement it.

Tested by:	current
2009-11-22 21:16:30 +00:00
Pyun YongHyeon
f681b29a6d Fix two long standing bugs on bge(4). Most pre BCM5755 controllers
have a DMA bug when buffer address crosses a multiple of the 4GB
boundary(e.g. 4GB, 8GB, 12GB etc). Limit DMA address to be within
4GB address for these controllers. The second DMA bug limits DMA
address to be within 40bit address space. This bug applies to
BCM5714 and BCM5715 and 5708(bce(4) controller). This is not
actually a MAC controller bug but an issue with the embedded PCIe
to PCI-X bridge in the device. So for BCM5714/BCM5715 controllers
also limit the DMA address to be within 40bit address space.
Special thanks to davidch@ who gave me detailed errata information.
I think this change will fix long standing bge(4) instability
issues on systems with more than 4GB memory.

Reviewed by:	davidch
2009-11-22 20:50:27 +00:00
Pyun YongHyeon
dfe0df9a76 For MSI case, interrupt is not shared and we don't need to force
PCI flush to get correct status block update. Add an optimized
interrupt handler that is activated for MSI case. Actual interrupt
handling is done by taskqueue such that the handler does not
require driver lock for Rx path. The MSI capable bge(4) controllers
automatically disables further interrupt once it enters interrupt
state so we don't need PIO access to disable interrupt in interrupt
handler.
2009-11-22 20:31:40 +00:00
Pyun YongHyeon
0aaf10578c Use capability pointer to access PCIe registers rather than
directly access them at fixed address. While I'm here don't touch
other bits of PCIe device control register except max payload size.

Reviewed by:	marius
2009-11-22 19:11:34 +00:00
Pyun YongHyeon
1715ec0d32 Remove extra white space. 2009-11-22 18:30:19 +00:00
Pyun YongHyeon
943787f3a7 Reimplement Rx buffer allocation to handle dma map load failure.
Introduce two spare dma maps for standard buffer and jumbo buffer
respectively. If loading a dma map failed reuse previously loaded
dma map. This should fix unloaded dma map is used in case of dma
map load failure. Also don't blindly unload dma map and defer
dma map sync and unloading operation until we know dma map for new
buffer is successfully loaded. This change saves unnecessary dma
load/unload operation. Previously bge(4) tried to reuse mbuf
with unloaded dma map which is really bad thing in bus_dma(9)
perspective.
While I'm here update if_iqdrops if we can't allocate Rx buffers.
2009-11-07 01:01:33 +00:00
Pyun YongHyeon
a669a81f0b bge(4) already switched to use UMA backed page allocator and local
memory allocator for jumbo frame was removed long time ago. Remove
no more used macros.
2009-11-06 22:37:29 +00:00
Pyun YongHyeon
c3bbfed430 Correct MSI mode register bits. 2009-11-06 01:11:59 +00:00
Pyun YongHyeon
0ac56796f7 Remove common DMA tag used for TX/RX mbufs and create Tx DMA tag
and Rx DMA tag separately. Previously it used a common mbuf DMA tag
for both Tx and Rx path but Rx buffer(standard ring case) should
have a single DMA segment and maximum buffer size of the segment
should be less than or equal to MCLBYTES. This change also make it
possible to add TSO with minor changes.
2009-11-04 20:57:52 +00:00
Stanislav Sedov
3889907fb2 - Give a name to the host coalescing bug fix WDMA mode register bit instead
of using hardcoded value in the code.
Obtained from:	OpenBSD
2009-10-07 14:29:48 +00:00
Stanislav Sedov
a57795536a - Add support for new BGE chips (5761, 5784 and 57780). These chips uses new
BGE_PCI_PRODID_ASICREV register to store the chip identifier and its revision.
- Add new grouping macro for 7575+ chips (BGE_IS_5755_PLUS).
- Add IDs for Fujitsu-branded Broadcom adapters.

PR:             kern/127587
Tested by:      Thomas Quinot <thomas@quinot.org> (BCM7561 A0)
MFC after:	2 weeks
Obtained from:  OpenBSD
2009-10-07 13:12:43 +00:00
Marius Strobl
c9ffd9f058 - Ensure that INTx isn't disabled, as these chips apparently have a
quirk requiring it to be enabled even when using MSI. This makes
  the latter work again after r189285.
- Remove a comment which no longer applies since r190194.
2009-03-23 14:36:50 +00:00
Marius Strobl
4f09c4c7e5 - In bge_ifmedia_upd_locked() take advantrage of LIST_FOREACH().
- If boot verbose, print asicrev, chiprev and bus type on attach.
- For PCI Express devices:
  1) Adjust max read request size to 4Kbytes
  2) Turn on FIFO_LONG_BURST in RDMA during bge_blockinit()
  Though 1) does not seem to have much to do with the poor TX performance
  observed on PCI Express bge(4), 2) does fix the problem. [1]
- Nuke the RX CPU self-diag, which prevents working cards from working
  (Linux tg3 does not have this diag neither does OpenBSD's bge(4)).
  The increasing of the firmware handshaking timeout to 20000 retries
  done as part of the original commit isn't merged as way already have a
  way higher BGE_TIMEOUT of 100000.

PR:		119361 [1]
Obtained from:	tg3 via DragonflyBSD [1], DragonflyBSD
2009-03-21 00:23:07 +00:00
Marius Strobl
c00cf72245 Use bus_{read,write}_4(9) instead of bus_space_{read,write}_4(9)
in order to get rid of the bus space handle and tag in the softc.

MFC after:	1 month
2008-10-14 20:28:42 +00:00
Marius Strobl
5fea260f19 Improve the integration of BCM5906[M] support:
- Rename BGE_FLAG_EEPROM to BGE_FLAG_EADDR to underline it's absence means
  "there's no chip containing an Ethernet address fitted to the BGE chip
  so we have to get it from the firmware instead" rather than "there's no
  EEPROM, but maybe NVRAM or something else".
- Don't treat BCM5906[M] generally like chips w/o BGE_FLAG_EADDR set, just
  in the two cases really necessary. This gets us line with the original
  patch for DragonFlyBSD.
- For sparc64 restore the intended behavior of obtaining the Ethernet
  address from the firmware in case BGE_FLAG_EADDR is not set, even for
  BCM5906[M].
- Fix some style(9) bugs introduced with rev. 1.208 of if_bge.c

Approved by:		jhb
Additional testing by:	Thomas Nystroem (BCM5906)
2008-05-14 21:00:27 +00:00
Bjoern A. Zeeb
4f0794ff96 Use a better approach to force the interrupt which should work for
all cards/modes.
In addition to the intr forcing added with rev. 1.205 adopt the other
places to use the same logic.

We need to exclude a few chips/revisions (5700, 5788) from using the
enhanced version and fall back to the old way as that is the only
method they support.

Tested by:	phk
Suggested by:	davidch, Broadcom (thanks a lot for the help!)
MFC after:	16 days
2008-05-05 18:42:17 +00:00
John Baldwin
38cc658ff6 Add support for the BCM5906[M] adapters. These adapters only support
10/100 operation and place the mailbox registers at a different offset.
They also do not have an EEPROM, so the MAC address must be read from
NVRAM instead.

MFC after:	1 month
PR:		kern/118975
Submitted by:	benjsc, Thomas Nyström  thn at saeab dot se
Submitted by:	sephe (original patch for DragonflyBSD)
2008-04-29 19:47:13 +00:00
John Baldwin
8c9056b50b Style tweak to the 5722 chipid to match the rest of this file. 2008-03-06 21:48:34 +00:00
John Baldwin
bcc20328f5 Flesh out support for the BCM5722 by recognizing the phy on the 5722 and
the specific ASIC revision.

MFC after:	1 week
Obtained from:	OpenBSD (mii/phy bits)
2008-03-06 21:42:48 +00:00
Jung-uk Kim
86543395c1 Add a flag for Ethernet@WireSpeed capability and correct chip revisions.
The idea was taken from OpenBSD and cross-referenced with Linux driver.
2008-01-18 22:09:50 +00:00
Remko Lodder
effef9789a Add support for the BMC5722.
Reported by:		Chris Shenton <chris at shenton dot org> on current@
Approved by:		imp (mentor)
2007-12-25 19:51:18 +00:00
Jung-uk Kim
186f842beb Rearrange DMA read/write control register settings based on document snippet
provided by davidch via glebius.

PR:		kern/96806
2007-05-22 19:22:58 +00:00
Marius Strobl
08013fd336 - Add support/quirks for the on-board BGEs found in Sun Blade 1500
Blade 2500, Fire V210 and probably some other sparc64 machines.
  These chips are typically not fitted with an EEPROM which means
  that we have to obtain the MAC address via OFW and that some chip
  tests will just always fail.
  These changes are based on the respective code found in OpenBSD
  with some additional info obtained from OpenSolaris and some style
  suggestions by jkim@. They also have the desired side-effect of
  respecting the 'local-mac-address?' system configuration variable
  for the affected BGEs.
- In bge_attach() factor out calling bge_release_resources() before
  going to the fail label into the fail label as well as replace a
  magic 6 with ETHER_ADDR_LEN.

Reviewed by:	yongari (before style changes), jkim
2007-04-30 21:55:27 +00:00
Jung-uk Kim
0c4a1ef8dc Add more chipset revision IDs.
Obtained from:	OpenBSD
2007-03-09 01:30:23 +00:00