- Added 4 speaker enable to initialization sequence.
- Removed delays between register pokes which appear to aggravate a
problem this card has sampling at 44.1kHz. With any form of delay,
skew relative to system clock at 44.1kHz is usually in range 0-25%
(now 0-3%). No other rates exhibit this problem.
- Changed structs cmi_* to sc_*.
Approved by: Cameron Grant <gandalf@vilnya.demon.co.uk>