Commit Graph

161 Commits

Author SHA1 Message Date
Warner Losh
c98c9548b1 The tunable is hw.pcic.irq, but the hw.pcic.override_irq was how it was
reported in sysctl.
2001-08-25 22:39:44 +00:00
Warner Losh
0f102020db Rearrange how we do interrupt routing tweaking. We now have
hw.pcic.intr_path	{1,2}	1 == ISA, 2 == PCI
	hw.pcic.init_route	Force TI chipset initializations in edge case.
2001-08-21 20:04:42 +00:00
Warner Losh
dc2e861bdb Merge from stable (which seems to have been spammed at some point in current):
#ifdef the deltap pcic_set_memory_offset argument so that raylink
driver works.
2001-08-14 23:34:09 +00:00
Warner Losh
cc3a07dbb3 Minor style(9) nits to make code more readable 2001-08-14 23:16:01 +00:00
Warner Losh
482a667634 Treat min,max of 0,0 for IRQ special. Reject it if we didn't specifically
assing an IRQ.  Add better comments while I'm here.

MFC after: 1 day
# Note: That's merging all the -current pci pcic code, not just this one
# change for the Aug 15th code freeze.
2001-08-14 19:23:12 +00:00
Warner Losh
043b27b450 Move ISA interrupt ISR and timeout routines to pcic from pcic_isa so
that we can use them in the pci code when we have to fall back to ISA
interrupt routing.
2001-08-10 06:07:20 +00:00
Warner Losh
0d3576d9bc Now that we are setting a bit in the PCIC_INT_GEN (0x3) register, we
can't blindly write zero into it to disable the card.  We must
preserve this bit.  This changes pcic_disable to only clear the bits
we know we need to clear on card disable, thus preserving the magic
bit for many TI bridges.

This appears to have fixed the problems that people are reporting
about the system failing to recognize cards being inserted or removed
(or both).  Greg: This may fix your problem too :-).
2001-08-05 07:02:42 +00:00
Warner Losh
53af1c8a3d TI cardbus bridges, 12xx and newer, have an interesting register. It
is the diagnostics register at offset 0x93.  When bit 5 is set in this
register, bits 4-7 in ExCA register 0x5 being 0000 are required for
pci interrupt routing.  When it is clear, then bit 4 of ExCA register
0x3 is used to enable it.

The only other issue is that when you route interrupts this way, you
must read ExCA register 0x4 in order to clear the interrupt, else you
get an interrupt storm.

Deal with this requirement by setting things up.  It is believed that
this won't hurt other chipsets, but other chipsets may require their
own work arounds.
2001-08-01 19:41:56 +00:00
Warner Losh
372458622f A bunch of interrupt related cleanup.
o Move PIOCSRESOURCE from pccard to pcic so the kernel can give pccardd
  better hints as to what resources to use.
o Implement an undocumented hw.pcic.interrupt_route to allow people that
  need to do so to route their interrupts in a non-standard way.
o Only preallocate a resource in probe if we're routing via pci.
o If we aren't routing via pci, then set the irq to use explicitly
  to defeat the automatic IRQ routing of the pci layer.

This, with the pccardd code should be close to what can be committed
to -stable.
2001-07-31 06:44:37 +00:00
Warner Losh
4ee0b26518 Move pcic_override_irq from pcic_isa, to pcic. 2001-07-31 06:32:02 +00:00
Warner Losh
29edba568b It is spelled INTR_FAST in current and INTR_TYPE_FAST in stable, so try to
make allowances.
2001-07-28 04:08:25 +00:00
Warner Losh
9d0ea05213 Stable requires machine/clock.h to quiet warnings. It isn't
strictly necessary on current, but having it in here makes the diffs with
stable smaller and doesn't hurt anything except for phk's redundant include
finder.
2001-07-28 04:04:05 +00:00
Warner Losh
d13600a5af Introduce two new tunables from the boot loader.
hw.pcic.irq		Globally set the IRQ for all pcic devices' management
			interrupt (aka card status change or CSC interrupt)
			This is what used to be known as
			machdep.pccard.pcic_irq (which has been retained for
			now for compatibility).
hw.pcic.ignore_fuction_1 Ignores function 1 for all PCIC bridges by not
			attaching to them.  Lucent released a huge batch
			of cards that were imporperly manufactuered (lacking
			the 0 ohm resister to disable slot 1).  This is
			a big hammer to keep those cards from causing problems
			(I've had 4 people contact me saying my patches
			worked great once they added a kludge to always ignore
			function 1, or until they soldered these resistors
			in place!).

No clue where to document these.  They act as both boot loader environment
variables, as well as read-only sysctls after boot.

At the same time, sort sys/systm.h in its proper order after sys/sysctl.h.
2001-07-27 16:07:02 +00:00
Warner Losh
ebea20aed7 Minor nits merged from my stable tree:
o kill blank line that I introduced in cardinfo.h
o Delete unused variable wasinactive.
o return 0 from pccard_resume.
o Set the state and lastsate initially to be empty.
o move comment above code for interrupt dispatching.
o Powerstate interface is now available as of 430002, not 500000 (note that
  this change will be not 100% correct since the power state stuff didn't
  enter current until well after 500000, but it is good enough for the two
  branche we have going now).
2001-07-27 07:47:35 +00:00
Warner Losh
c1c1a23f53 Attempt to fix and document interactions between suspend/resume and pccardc
power x 0.

pccardc power x 0 used to disable the slot.  But a suspend/resume
would reactivate the pccard.  It no longer does that.  Now the
disabling of the slot is sticy until it is reset with power x 1 or the
card is ejected.  This seems closer to correct behavior to me.

o Process all card state changes the same using pccard_do_stat_change().
o Cleanup disabling the card so that we can preserve the state after
  the change.  Basically, don't set it to empty as often as we do.
o On suspend, the new state is "empty" and the laststate is "suspend"
o Document state machine with a diagram of states and edges.  The
  edges are labeld to tell the reader what event causes the external
  state changes.
o "machdep.pccard.pcic_resume_reset" may be obsolete now.  We always
  call the bridge driver's resume method on resume now.  Otherwise cards
  won't automatically show up.  If it needs to stay, I'll add it back.
2001-07-27 07:21:42 +00:00
Warner Losh
e598f66151 Check the state of the slot when we resume. Set it to empty if we no
longer have a pccard in the slot.  This fixes the problem where pccard
would say that a card had been inserted on resume.  This also appears
to make the insert/remove events more reliable after a resume as well,
but that may be a different bug I need to hunt down.
2001-07-26 23:23:36 +00:00
Warner Losh
c799054841 Clarify some of the 3.3V code with better comments. Also, since the
types are treated as a bitfield, test them as such.
2001-07-01 23:40:54 +00:00
Warner Losh
8ffbd9cfc5 Add comments explaining why we do the somewhat odd irq mapping on PC98
machines with C-BUS cards.
2001-07-01 23:40:41 +00:00
Warner Losh
f5d80c4a5f Minor whitespace nit. 2001-07-01 23:40:19 +00:00
Warner Losh
9ae6dc2e12 Work around a bug in the current interrupt system by explicitly
rejecting INTR_FAST interrupts.  Since they can't be shared anyway,
this just short circuits a failure case that should work but is panic
fodder now.

This bug is that if the interrut condiation is active when you activate
the interrupt, then the interrupt routine will be called.  jhb had
a patch that may or may not work to fix it, but I've lost it.

This may be due to the sio probe doing something odd too.
2001-06-25 04:13:54 +00:00
Warner Losh
7077bc34aa Save the IRQ that we get in pci attachment.
Print type of pci bridge we find.
Force the IRQ of pci bridges upon all its children.
Allocate the resources on behalf of the bridge when we're testing to see if
they exist.

This should help people who don't read updating instructions very well.

This patch started out with an idea from Shigeru Yamamoto-san in -current.
2001-06-16 06:33:01 +00:00
Warner Losh
11cedf79a8 On PC-98, map IRQ 6 to IRQ 7 at the pcic level. That is, when we're
told to use IRQ 6, progam the pcic to use irq 7 instead.  Evidentally,
at least some of the cards are wired this way.  If you want to use irq
6, configure it.  All the mapping is done just before we set the
interrupt registers.  See [FreeBSD98-testers 5064] for details.

Added commentary about valid interrupts on some CBUS pc98 CL PD6722
based cards.

Submitted by: Hiroshi TSUKADA-san <hiroshi@kiwi.ne.jp>
2001-06-16 06:18:16 +00:00
Warner Losh
94b197e96d Move the pcic interrupt from pcic.c to pcic_isa.c. The ISA handling
for card change interrupts is different than the pci stuff that's
coming soon.  Set the management irq in different ways.  If
pci_parallel interrutp routing, then use the PCI way of getting
interrupts.  Move polling mode into pcic_isa since when we're routing
via pci polling doesn't work because many bridges (systems hang solid).

If we're routing interrupts via pci, they can be shared, so flag them
as such.

Note, this doesn't actually change anything since the pci attachment
isn't quite ready to be committed.
2001-06-04 03:29:06 +00:00
Warner Losh
f83a4e8171 Turns out that one bit isn't enough. Introduce two new fields
csc_route and func_route to hold the way that each interrupt is
routed.  csc is Card Status Change in the datasheets and standard, but
is called "Management Interrupt" in FreeBSDese.  There are three types
of interrupt routing:  ISA parallel, PCI parallel and ISA serial (some
chipsets support other types as well, but I don't plan on supporting
them).

When we try to allocate an interrupt, and the type for that interrupt
is pci_parallel, allow it to be shared by oring in RF_SHAREABLE to the
flags argument.  Introduce pcic_alloc_resource to allow this to
happen.
2001-05-28 02:53:02 +00:00
Warner Losh
92d08a4dcf Allow a shareable interrupts. Note, the bridge must set this flag or
the irq will be unshareable, as things are now.

More work likely is needed, but this is a good checkpoint.

# pcic_pci.c is getting closer :-)
2001-05-27 05:53:37 +00:00
Warner Losh
995823e999 Migrate from unit based to dev base. Don't save unit number, but do save
dev.  Convert all uses of unit to dev as appropriate.  Minor comment fixes
to pcic_softc definition.
2001-05-25 18:28:49 +00:00
Warner Losh
f7d83eb183 Add intrack field to each slot. This can be used to acknowledge
interrupts on other buses.  Right now it isn't used, but will be for
the pci attachment.

# Add copyright by me for this year since I've changed so much.
2001-05-25 05:25:43 +00:00
Warner Losh
5da1cb2e2f Minor name space issues. 2001-05-25 05:22:00 +00:00
Warner Losh
8cad38176d Use bus_space functions rather than inb/outb.
Add defines for PCIC_INDEX and PCIC_DATA offsets.
Change PCIC_INDEX_0 to PCIC_PORT_0
Add define for PCIC_NPORT.
Document why the vadem probe works.
2001-05-24 06:54:48 +00:00
Warner Losh
99efcc2bb9 Move getb1 and putb1 from pcic_isa.c to pcic.c. Rename them to
pcic_{get,put}b_io.  There are some pci bridges (the CL-PD6729 and
maybe others) that do not have memory mapped registers, so we'll need
these in both places.  Declare them in pcicvar.h.
2001-05-24 04:03:28 +00:00
Warner Losh
a8ed536b94 Add better support for the Ricoh 5C296 and 5C396 chips. These chips
have a slightly different 3.3V support than the other clones, so
compensate as best we can.  Note: 3.3V support is untested since I do
not have any 3.3V cards that I know of to test it with.
2001-05-23 05:06:04 +00:00
Warner Losh
13ab4e6dc1 Move allocation of ExCA registers from the base driver into the bus
attachment code.
2001-05-21 07:32:46 +00:00
Warner Losh
2003c3f530 Move setting of Vcc bit to before the vcc switch statement. The
datasheets I have seem to indicate that generally this bit is viewed
as a toggle.  Correct comments to match code.
2001-05-21 05:49:15 +00:00
Warner Losh
57462c010c Next step on the road to pci: power taming.
Work through the various power commands and convert them from a "is
this a foo controller or a foo' controller or a foo''' controller" to
a cabability based scheme.  We have bits in the softc that tell us
what kind of power control scheme the controller uses, rather than
relying on being able to enumerate them all.  Cardbus bridges are
numerous, but nearly all implement the i82365sl-DF scheme (well, a few
implement cirrus CL-PD67xx, but those were made by Cirrus Logic!).

Add a pointer back to the softc in each pcic_slot so we can access
these flags.

Add comments that talk about the issues here.  Also note in passing
that there are two differ Vpp schemes in use and that we may need to
adjust the code to deal with both of them.  Note why it usually works
now.

We have 5 power management modes right now: KING, AB, DF, PD and VG.
AB is for the i82365 stpes A, B and C.  DF is for step DF.  PD is the
cirrus logic extensions for 3.3V while VG is the VADEM extensions for
3.3V.  KING is for the IBM KING controller found on some old cards.
# I'm looking for one of those old cards or a laptop that has the KING
# bridge in it.

We have to still cheat and treat the AB parts like the DF parts
because pci isn't here yet.  As far as I can tell, this is harmless
for actual old parts and necessary to work with 3.3V cards in some
laptops.

This almost eliminates all tests for controller in the code.  There
are still a few unrelated to power that need taming as well.
2001-05-21 04:44:14 +00:00
Warner Losh
e67316366d Next step towards pcic_pci: the ability to allocate mapped memory in attach.
o Introduce flags word to the softc.  This will be used to control various
  aspects of the driver.  Right now there are two bits defined, PCIC_IO_MAPPED
  and PCIC_MEM_MAPPED.  One for ISA cards that are I/O mapped, the other is
  for PCI cards that are memory mapped.  Only the ISA side is implemented
  with this commit.
o Introduce a pcic_dealloc which will cleanly dealloc resources used.  Right
  now it is only supported when called from probe/attach.
o Keep track of resources allocated in the pcic_softc.
o move pcictimeout_ch to the softc so we can support multiple devices
  in polling mode.
o In ISA probe, set PCIC_IO_MAPPED.
o Introduce and compute the slot mask.  This will be used later when
  we expand the number of slots on ISA from 2 to 4.  In such a case, we
  appear to have to use polling mode otherwise we get two different cards
  trying to drive the same interrupt line.  I don't have hardware to
  test this configuration, so I'll stop here.
2001-05-21 03:22:52 +00:00
Warner Losh
69ffb52731 Two comments and one bug fix:
o Add defines for the VS[12]# bits in register 0x16.
o Add comment about what we're doing reading register 0x16 (PCIC_CDGC)
  in the DF case.
o Check bit VS1# rather than a random bit I was checking due to a bogus
  transcrition on my part from nakagawa-san's article.
o Add note about IBM KING and 3.3V operation from information larned from
  wildboard.
2001-05-21 00:55:44 +00:00
Warner Losh
aa3a855755 Add back the plain i82365 to the list of bridges that do special
things to get 3.3V.  It appears that some cardbus chipsets have id
registers that say they are C step parts, but they really support the
DF step 3.3V functionality.

# Need to verify that IBM KING is handled properly since the MISC1
# register is really a cirrus logic only register.
2001-05-19 06:36:09 +00:00
Warner Losh
0eee936491 Initialize cinfo structure at compile time rather than run time since
they are now constant.
2001-05-19 06:17:37 +00:00
Warner Losh
11695ef016 Now that we've moved the mecia support out of pcic.c to its own
driver, we no longer need to go through the cinfo.XXXX indirections.
restore the direct calls that were replaced earlier.
2001-05-19 05:50:42 +00:00
Warner Losh
bc0f2245d1 Move ISA specific code into pcic_isa. This is the probe routine, the
get/setb1 routines.  Also expose clrb and setb as pcic_{clrb,setb} so
we can use it from the probe.  pcic_probe is no longer needed.
2001-05-19 05:21:23 +00:00
Warner Losh
08db6b5c8e It turns out that Intel's i82365sl-DF step has the same ID as the VLSI
82C146.  The Intel i82365SL-DF supports 3.3V cards.  The Step A/B/C
parts do not appear to support this.  This is hard to know for sure
since it was deduced from "compatible" parts' data sheets and the
article mentioned below.

Rework the VLSI detection to be a little nicer and not depend on
scanning cards twice.  This would allow bad VLSI cards to coexist with
a good intel card, for example.  We now detect i82365SL-DF cards where
before we'd detect a VLSI.  For the most part, this is good, but we
run a small chance of detecting a single slot 82C146 as a i82365SL-DF.
Since I can't find a datasheet for the 82c146, I don't know if this is
a problem or not.

This work is based on an excellent article, in Japanese, by NAKAGAWA,
Yoshihisa-san that appeared in FreeBSD Press Number 4.  He provided a
patch against PAO3 in his article.  Since the pcic.c code has changed
some since then, I've gone ahead and cleaned up his patch somewhat and
changed how the code detects the buggy '146 cards.

I also removed the comment asking if there were other cards that
matched the 82C146 since we found one and additional information isn't
necessary.
2001-05-19 04:53:20 +00:00
Warner Losh
5a695e4878 Separate out isa attachment to its own file. The pci attachment will
soon attach directly to pcic rather than the kludge pci-pcic device we
have now.

In some ways, this is similar to the work PAO3 did to try to support
cardbus bridges.  In some ways different.  This and future commits
will be taking from the spirit of many of those changes.  pcicvar.h is
completely different from the pcicvar.h that appeared in PAO3, but
similar in concept.
2001-05-16 07:32:04 +00:00
Warner Losh
fae3b4e989 The mecia support has moved to the mecia driver, so remove the copy of
it here.
2001-05-15 23:50:58 +00:00
Warner Losh
ca4d6d4f8c {G,S}ET_UNIT are now unused, gc them 2001-05-15 03:32:45 +00:00
Warner Losh
f81f90ff95 It turns out that pcic_slot::slotnum was really unused, so don't set
it.
2001-05-14 23:14:23 +00:00
Warner Losh
12d6689ccd Remove static array of slots. We now have state information for each
slot in a softc for each unit that we probe.  Also remove validunits
static, since it is no longer necessary.
2001-05-14 23:08:58 +00:00
Warner Losh
07e0ca29b5 Fix the so called "static bug" in polling mode. Some desktop cards
have bad grounding characteristics which allow small static discharges
(or sunspots, we're not 100% sure which) to reach the bridge chip.
This causes the bridge chip to wedge/reset itself.  There's no known
cure short of rebooting.

The bug manifests itself by the STAT_CHG return 0xff when read.  This
is impossible because the upper bits are reserved (and therefore
zero).  In addition, some of the lower bits are one only for memory
cards, which OLDCARD doesn't support, so if they are set, something
seriously foobar'd is going on.

So far we've seen this in exactly one brand of pcmcia <-> isa bridge
which plug and play identifies only as "VIA PCMCIA CARD".  This card
just has buffers on the isa card and the actual bridge chip on the
remote slot, which is connected by long ribbon cables.  We think this
long cable run, coupled with the lack of coupling capacitors is a
major reason why it is so static sensitive while its bretheren aren't.

Work Supported by: Timing Solutions, Inc.

MFC After: 3 days
2001-05-14 21:08:20 +00:00
Warner Losh
3ad72a92eb When activating or deactivating a resource, only attempt to deal with
the resource activation if we're dealing with our grandchild.
Otherwise, we run into two problems.  One, if the pccard layer wanted
to allocate and activate something, we'd wind up trying to do the
wrong thing twice: the ivars are wrong and we don't want the bridge to
map the resource to the slot.  If we're more than a grandchild, then
who knows what kind of ivar is present.  In either of these cases, we
just pass it up the food chain.
2001-05-14 04:53:02 +00:00
Warner Losh
180c9afb62 Return errors for unsupported operations on pcic_get_res_flags rather
than 0.
2001-05-13 04:44:45 +00:00
Warner Losh
87c53da12e Change #ifdef PC98 to #ifdef MECIA_SUPPORT and define MECIA_SUPPORT
when PC98 is defined.  This is in perparation for a mecia driver
separate from pcic, assuming that all goes well with that effort.
MECIA_SUPPORT won't be removed until after that support is working.
2001-05-13 04:16:09 +00:00