Commit Graph

2891 Commits

Author SHA1 Message Date
Ian Lepore
942dfd1f3f Use the explicit member initializer style to init the bus_space struct.
Fill in some formerly NULL members where the implementation function
exists.  Add a dummy function that panics and use it as a placeholder
for thigns that are still unimplemented.  Remove a few unused includes.
2015-01-21 02:35:04 +00:00
Ian Lepore
4098ccafa4 Revise the arm bus_space implementation to avoid dereferencing the tag on
every operation to retrieve the bs_cookie value almost nothing actually uses.

The bus_space struct contains a private data pointer (poorly named bs_cookie,
now renamed to bs_privdata) which is used only by a few old armv4 xscale
implementations.  The bus_space functions were all defined to take this
value as the first parameter instead of the bus_space_tag_t, requiring all
the inline macro and function expansions to dereference the tag to pass it
to another function, which never uses it.  Now all the functions take the tag
as the first parameter and retrieve the privdata if they need it.

Also fix a couple bus_space_unmap() implementations that were calling
kva_free() instead of pmap_unmapdev().

Discussed with:	   cognet
2015-01-21 01:06:08 +00:00
Ian Lepore
16e2dc663f Add inline implementations of arm bus_space_read/write_N().
Reviewed by:	cognet
2015-01-20 22:56:59 +00:00
Andrew Turner
79b52c387e Remove the SMP code from locore-v4. These will never use the SMP code as
there is no multi-core hardware prior to ARMv6.

Sponsored by:	The FreeBSD Foundation
2015-01-20 11:32:48 +00:00
Andrew Turner
195237551a Add the User and PL1 read only and reqd write thread ID registers.
Sponsored by:	The FreeBSD Foundation
2015-01-20 11:11:32 +00:00
Ganbold Tsagaankhuu
e2763dca83 Enable Synopsys DesignWare Mobile Storage Host Controller
driver on Rockchip boards. It currently supports PIO mode
and dma mode needs external dma controller to be used.

Submitted by:   jmcneill
Approved by:    stas (mentor)
2015-01-20 09:07:28 +00:00
Oleksandr Tymoshenko
eaf6610dd7 Properly clear IRQ status in order to fix "Spurious IRQ" message from AINT.
This register is not documented in TRM but that's what linux driver does
2015-01-20 02:24:08 +00:00
Ian Lepore
86ee58d992 Save the command-and-flags value into the shadow register when it is written.
This doesn't actually change any behavior, because it just allows a 16-bit
read of the command register to return the correct value, and nothing
actually does a 16-bit read of that register.
2015-01-18 20:47:21 +00:00
Oleksandr Tymoshenko
81d8de5f75 Fix programming timing parameters to LCDC. Actual value used for HBP, HFP, HSW, VSW
is register's programmed value + 1.
2015-01-18 06:43:09 +00:00
Ian Lepore
bba987dc50 Add a new SDHCI quirk, SDHCI_QUIRK_DONT_SET_HISPD_BIT. Apparently some
sdhci controllers, such as the one on a Raspberry Pi, mishandle the signal
timing in high speed signaling mode, but run just fine in standard mode
with the bus running at frequencies between 25-50MHz (which shouldn't work).

This is the solution adopted by U-Boot and other OSes (linux and *BSD)
for the timeouts on Raspberry Pi boards with certain SD cards.  Some
research shows that this quirk is also used on a few other boards, so the
fix is a generic quirk instead of being in the RPi-specific driver code.

This change is based on information discovered by Michal Meloun.
2015-01-17 19:57:03 +00:00
Ian Lepore
d6f695fd31 Minor cleanups, comment changes. No need to load 3 values when setting up
the stack for secondary cores, the other two values are only used for zeroing
bss on the primary core.  No need to store the size of the stack at the
top of the stack (seems to be a leftover instruction from some cut-n-paste).
2015-01-17 18:40:46 +00:00
Ian Lepore
97665af981 Enable the snoop control unit during MP startup, rather than relying on
the bootloader to have done so.

Submitted by:	Thomas Skibo <thomasskibo@sbcglobal.net>
2015-01-16 19:49:10 +00:00
Navdeep Parhar
ca7fe84a61 Plug cxgbe(4) back into !powerpc && !arm builds, instead of building it
on amd64 only.
2015-01-16 01:39:24 +00:00
Bjoern A. Zeeb
6333a401ff Fix cpsw(4) after r277203 which folded 'struct m_hdr' into 'struct mbuf'.
While in theory this should have been a transparent change (and was for all
other drivers), cpsw(4) never used the proper accessor macros in a few
places but spelt the indirect m_hdr.mh_* out itself.  Convert those to
use m_len and m_data and unbreak the driver build.
2015-01-15 02:22:52 +00:00
Luiz Otavio O Souza
e4b6eaf73a Fix the C -> K temperature conversion for the dev.cpu.0.temperature sysctl.
Previous code was discarding the last digit.

Remove the unused temperature conversion macros.
2015-01-15 01:05:05 +00:00
Luiz Otavio O Souza
02a42e683f Catch a few cases where we need to release memory resources on errors.
Place parentheses around variables in macros.

MFC after:	3 days
2015-01-15 00:48:53 +00:00
Ganbold Tsagaankhuu
d84d6e7716 Correct cpu type, it was rather Cortex A12 R0.
Approved by:    stas (mentor)
2015-01-14 01:23:50 +00:00
Ruslan Bukin
eff43c7467 Rename Exynos UART driver. No functional change.
Submitted by:	Michal Meloun <meloun@miracle.cz>
2015-01-13 15:04:28 +00:00
Ganbold Tsagaankhuu
cebf67b056 Add CPU ID for ARM Cortex A17.
Approved by:    stas (mentor)
2015-01-13 07:49:07 +00:00
Luiz Otavio O Souza
2566c5264a Add support to turn off Beaglebone with poweroff(8) or shutdown(8) -p.
To cut off the power we need to start the shutdown sequence by writing
the OFF bit on PMIC.

Once the PMIC is programmed the SoC needs to toggle the PMIC_PWR_ENABLE
pin when it is ready for the PMIC to cut off the power.  This is done by
triggering the ALARM2 interrupt on SoC RTC.

The RTC driver only works in power management mode which means it won't
provide any kind of time keeping functionality.  It only implements a way
to trigger the ALARM2 interrupt when requested.

Differential Revision:	https://reviews.freebsd.org/D1489
Reviewed by:	rpaulo
MFC after:	2 weeks
2015-01-12 03:23:16 +00:00
Ian Lepore
244fe94f3b Handle dma mappings with more than one segment for rpi sdhci.
The driver inherently does dma in 512 byte chunks, but it's possible that
such a buffer can span two physically discontiguous pages (such as when
a userland program does IO on the raw /dev/mmcsdN devices).  Now the driver
can handle a buffer that's split across two pages.

It could in theory handle any number of segments now, but as long as IO is
being done in 512 byte blocks it will never need more than two.
2015-01-12 02:42:33 +00:00
Ian Lepore
740a7a7597 Enable ALT_BREAK_TO_DEBUGGER for rpi. 2015-01-12 02:29:23 +00:00
Ian Lepore
bf160401a9 Check for and handle failures of bus_dmamap_load(). The driver currently
requires that each 512 byte IO be in a single contiguous buffer, but if a
buffer crosses a page boundary and the physical pages aren't contiguous
you can get an EFBIG failure (too many segments).

The driver really should handle multiple segment IO, but before adding that
I wanted to make sure that it's handling failure properly while the failure
is easily recreatable.
2015-01-11 21:27:46 +00:00
Ian Lepore
bffed0e9c8 Store the shadow command/mode register in the softc, not a local static var.
Submitted by:	Michal Meloun
2015-01-11 17:00:24 +00:00
Andrew Turner
3f53a2d612 Rename gic_init_secondary to arm_init_secondary_ic to help with the merge
of the arm_intrng project branch.
2015-01-11 16:46:43 +00:00
Andrew Turner
c9ac548c01 Rework the GIC driver to ease the import of the arm_intrng branch. The
common code has been pulled out to static functions.
2015-01-11 10:26:49 +00:00
Warner Losh
c4765af73f Add infrastructure to build dtb files from dts files. 2015-01-08 18:28:06 +00:00
Ian Lepore
9326d90f0e Move the inclusion of cpu-v6.h inside the #ifdef _KERNEL block, so that
userland programs (which probably don't actually need machine/cpu.h) compile.
2015-01-08 03:59:03 +00:00
Ian Lepore
8a474d01ee Add accessors for the ARM CP15 performance monitor registers. Also ensure
that some #ifdef SMP code is also conditional on __ARM_ARCH >= 7; we don't
support SMP on armv6, but some drivers and modules are compiled with it
forced on via the compiler command line.
2015-01-08 01:28:46 +00:00
Luiz Otavio O Souza
60245f5103 Fix the handling of pull-up and pull-down for RK3188.
For this to work the driver needs to know the bank it has attached to since
the registers for the first 12 pins are at a different location.

Move the lock initialization to simplify the code.
2015-01-07 19:15:11 +00:00
Luiz Otavio O Souza
1c15a29600 Reduce the maximum number of pins for the Rockchip RK3188, this driver
isn't supposed to manage all the GPIO pins in the system from a single
instance, instead it will attach to each one of the four available GPIO
controllers and only deal with one bank at time (32 pins per bank).

Rework part of the driver to take advantage of that, this simplify the
code a lot.

Also fix a bug in rk30_gpio_get_function() which wouldn't return the
correct values.

While here fix a typo in register name.
2015-01-07 16:55:55 +00:00
Mark Johnston
bdb9ab0dd9 Factor out duplicated code from dumpsys() on each architecture into generic
code in sys/kern/kern_dump.c. Most dumpsys() implementations are nearly
identical and simply redefine a number of constants and helper subroutines;
a generic implementation will make it easier to implement features around
kernel core dumps. This change does not alter any minidump code and should
have no functional impact.

PR:		193873
Differential Revision:	https://reviews.freebsd.org/D904
Submitted by:	Conrad Meyer <conrad.meyer@isilon.com>
Reviewed by:	jhibbits (earlier version)
Sponsored by:	EMC / Isilon Storage Division
2015-01-07 01:01:39 +00:00
John Baldwin
3e32dff52c Remove "New" label from NFSCL/NFSD now that they are the only NFS
client/server.  While here, remove duplicate NFSCL from sys/conf/NOTES.

Approved by:	rmacklem
2015-01-06 16:15:57 +00:00
Hans Petter Selasky
b217d18412 Add 64-bit DMA support in the XHCI controller driver.
- Fix some comments and whitespace while at it.

MFC after:	1 month
Submitted by:	marius@
2015-01-05 20:22:18 +00:00
Ian Lepore
fbf1ef4849 Switch all arm kernels with option SMP to use SCHED_ULE instead of 4BSD. 2015-01-03 23:57:03 +00:00
Ian Lepore
dad0c32719 Remove commented-out options SMP and APIC_IO from old arm boards that will
never be able to support smp.
2015-01-03 23:30:29 +00:00
Ian Lepore
7e55f8c198 Add a new trap-v6.c which has support for all armv7 exceptions. This
mostly paves the way for the new pmap code, and shouldn't result in any
noticible behavior differences.

Submitted by: Svatopluk Kraus <onwahe@gmail.com>,
              Michal Meloun <meloun@miracle.cz
2015-01-03 22:33:18 +00:00
Ian Lepore
301e1601ad Fix alignment directives in arm asm code after clang 3.5 import.
The ancient gas we've been using interprets .align 0 as align to the
minimum required alignment for the current section.  Clang's integrated
assembler interprets it as align to a byte boundary.  Fortunately both
assemblers interpret a non-zero value as align to 2^N so just make sure
we have appropriate non-zero values everywhere.
2015-01-02 23:46:26 +00:00
Ed Maste
942c32333e Update ELF headers to include additional defines
The elftoolchain project includes these additional defines for various
userland programs. Given that arch-specific defines are still interesting
in the context of userland programs reading or writing ELF metadata, they
should be included in top-level ELF headers.

Remove duplicate defines from ARM and MIPS elf headers.

Submitted by:	will (initial version)
Reviewed by:	imp, will
Sponsored by:	The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D844
2015-01-02 15:36:29 +00:00
Ruslan Bukin
e5df85ca42 Add driver for general-purpose I/O (GPIO).
Sponsored by:	DARPA, AFRL
2015-01-02 13:15:36 +00:00
Ian Lepore
67009184e3 Remove -Wa,-march=armv7a from arm kernel configs, it makes clang 3.5 sad
and apparently isn't needed now that we're using the integrated assembler.
2015-01-01 23:21:46 +00:00
Ian Lepore
54f9ec883d Define a WFI macro that expands to the right form of wait-for-interrupt
depending on the architecture.
2015-01-01 23:18:37 +00:00
Ian Lepore
bd96d0895e Rework the vpf support code so that it compiles with clang 3.4, 3.5, and gcc.
Michal Meloun did most of the hard work in figuring out what would work with
which compiler, I just reformated things a bit before committing.
2015-01-01 23:15:52 +00:00
Warner Losh
7ed11c5e5a Fix module builds on arm (and maybe others) by turning off a whole
raft of new warnings that appear to be on by default in clang 3.5.0.
Fix RPI-B build issues with new clang not liking the ability to pass
arbitrary flags to as, since some flags are more arbitrary (and thus
verboten) than others.

These warnings should be actually fixed in the code, but this is a
band-aide to get things (almost) building again.
2015-01-01 02:00:04 +00:00
Ian Lepore
490341147e A couple small fixes to make clang 3.5 happy... Move END(sigcode) to the
end of the actual instruction sequence for the function but before some
misc data in the text segment.  This eliminates a strange "size must be
constant" error from the integrated assembler.  Also, the build_pagetables
function was missing an END(), but really the problem is that it shouldn't
have an ASENTRY() because it's not a function that needs to be a global
symbol with unwind info and all, it's just a little private subroutine
used in very early kernel init.
2014-12-31 16:15:43 +00:00
Ian Lepore
9cb25d2d4c Change the order of operations for the initial cache setup. Turning off
the cache before clean/invalidate ensured that no new lines can come into
the cache or migrate between levels during the operation, but may not be
safe on some chips.  Instead, if the cache was enabled on entry, do the
wbinv while it's still enabled, and then disable it and do a separate
invalidate pass.  After the intitial writeback we know there are no
dirty lines left and no new dirty lines can be created as long as we
carefully avoid touching memory before turning the cache off.  Add a
comment about that so no new code gets inserted between those points.
2014-12-31 02:38:23 +00:00
Ian Lepore
3ed72a94a4 Fix a paste-o.
Submitted by:		Michal Meloun <meloun@miracle.cz>
2014-12-31 02:33:12 +00:00
Ian Lepore
952fc99936 Add a new locore.S that #includes the right (v4 or v6) implementation.
The kernel build machinery really wants the entry point to be in a file
named locore.S so doing this avoids a bunch of changes to the build system
for relatively little benefit.
2014-12-30 03:19:46 +00:00
Ian Lepore
dc15bc80b7 Rename locore.S to locore-v4.S and add a new locore-v6.S for starting up
armv6/7 systems.  We need to use some new armv6/7 features at startup
and splitting the implemenations to separate files will be more maintainable
than adding even more #ifdef sections to locore.S.

Because of the standardized interfaces to cache and MMU operations in armv7,
we can tolerate the kernel being entered with caches enabled.  This allows
running u-boot and loader(8) with caches enabled, and the performance
improvement can be dramatic (boot times can be cut from over a minute
to under 30 seconds).  The new implementation also has more robust cache
and mmu sequences for launching AP cores, and it paves the way for
upcoming changes to the pmap code which will use the TEX remap feature.

Changes in mp_machdep.c work with the new behavior in locore-v6 mp_entry,
and also reuse the original boot-time page tables to get transitioned
from physical to virtual addressing before installing the normal tables.

Submitted by Svatopluk Kraus and Michal Meloun with some changes by me.
2014-12-30 03:17:53 +00:00
Ian Lepore
10fe3ac09b Export MAXCPU to the assembler code, needing by upcoming changes to locore.S. 2014-12-30 02:58:34 +00:00