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5 Commits

Author SHA1 Message Date
Ed Maste
7a47d65d5d Use zero register instead of immediate 0x0 in MIPS assembly 
It seems GAS makes the substitution automatically, but Clang's
integrated assembler does not (yet). It fails with "invalid operand for
instruction."

Reported by:	sbruno
 2015-01-29 15:30:04 +00:00
Jayachandran C.
a7c139c0af Merge jmallett@'s n64 work into HEAD - changeset 1. 
Update libc assembly code to use macros that work on both o32 and n64.
Merge string functions from NetBSD.

The changes are from http://svn.freebsd.org/base/user/jmallett/octeon

Approved by:	rrs (mentor), jmallett
 2010-06-16 12:55:14 +00:00
Warner Losh
4ce261061f Add mips support libc from the mips2-jnpr branch of perforce. 2008-04-26 12:08:02 +00:00
David E. O'Brien
d9c0a739c5 Remove these abortive MIPS bits. 2002-03-23 17:55:32 +00:00
Warner Losh
d7ee48f115 Bring in initial libc support for mips. These files were taken from 
the OpenBSD tree and should be considered preliminary.  They are here
to facilitate building of the tree.
 1999-03-03 07:06:17 +00:00