Commit Graph

4147 Commits

Author SHA1 Message Date
Ian Lepore
3d9df27601 Remove unreferenced global function imx_gpt_get_timerfreq() and do some
cleanups enabled by that:

 - The only thing left in imx_gptvar.h was the softc, which IMO never
   should have been in there at all.  Move it into the driver, and
   delete the header file.

 - Remove several unneeded #includes from the driver.

 - Change imx_gpt_softc from global to static (it's used by DELAY()), and
   don't redundantly static-initialize it to NULL.
2017-03-19 04:03:39 +00:00
Ian Lepore
6c23d3cf76 Remove hardcoded bootverbose=1; imx53 systems boot using loader(8) and
users can set verbose if they want to.
2017-03-18 19:54:58 +00:00
Ian Lepore
26c048c814 Make the imx5 clocks driver work with vendor-supplied dts (which does not
supply the addresses for the DPLL register blocks) by hard-coding the
addresses in the driver source code.  Yes, this is just as bad an idea as
it sounds, but we have no choice.

In the early days of using fdt data, when we were making up our own data
for each board, we defined 4 sets of memory mapped registers in the data.
The vendor-supplied data only provides the address of the CCM register
block, but not the 3 DPLL blocks.  The linux driver has the DPLL physical
addresses (which differ by SOC type) hard-coded in the driver, and we
have no choice but to do the same thing if we want to run with the vendor-
supplied fdt data.

So now we use bus_space_map() to make the DPLL blocks accessible, choosing
the set of fixed addresses to map based on the soc id.
2017-03-18 17:50:49 +00:00
Andrew Turner
1eff4c0c37 Remove code for Marvell SoCs that lack a kernel config.
It seems to be old code from the armv6 project branch that never had a
kernel config.

Reviewed by:	mmel
Sponsored by:	ABT Systems Lrd
Differential Revision:	https://reviews.freebsd.org/D7166
2017-03-17 12:59:16 +00:00
Andrew Turner
83d9fd40d5 Make the default FDT implementation of platform_mp_setmaxid use the cpu
nodes from the DTB by default. This will allow us to enumerate the CPUs
without hard coding the CPU count into code.

Reviewed by:	br
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D9827
2017-03-17 12:45:53 +00:00
Andrew Turner
0960989f8f Move the IMX6 kernels to use PLATFORM_SMP. This is the last SMP config to
be migrated to this and will allow the removal of this option.

Reviewed by:	ian
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D9907
2017-03-17 12:34:56 +00:00
Marius Strobl
72dec0792a - Add support for eMMC "partitions". Besides the user data area, i. e.
the default partition, eMMC v4.41 and later devices can additionally
  provide up to:
  1 enhanced user data area partition
  2 boot partitions
  1 RPMB (Replay Protected Memory Block) partition
  4 general purpose partitions (optionally with a enhanced or extended
    attribute)

  Of these "partitions", only the enhanced user data area one actually
  slices the user data area partition and, thus, gets handled with the
  help of geom_flashmap(4). The other types of partitions have address
  space independent from the default partition and need to be switched
  to via CMD6 (SWITCH), i. e. constitute a set of additional "disks".

  The second kind of these "partitions" doesn't fit that well into the
  design of mmc(4) and mmcsd(4). I've decided to let mmcsd(4) hook all
  of these "partitions" up as disk(9)'s (except for the RPMB partition
  as it didn't seem to make much sense to be able to put a file-system
  there and may require authentication; therefore, RPMB partitions are
  solely accessible via the newly added IOCTL interface currently; see
  also below). This approach for one resulted in cleaner code. Second,
  it retains the notion of mmcsd(4) children corresponding to a single
  physical device each. With the addition of some layering violations,
  it also would have been possible for mmc(4) to add separate mmcsd(4)
  instances with one disk each for all of these "partitions", however.
  Still, both mmc(4) and mmcsd(4) share some common code now e. g. for
  issuing CMD6, which has been factored out into mmc_subr.c.

  Besides simply subdividing eMMC devices, some Intel NUCs having UEFI
  code in the boot partitions etc., another use case for the partition
  support is the activation of pseudo-SLC mode, which manufacturers of
  eMMC chips typically associate with the enhanced user data area and/
  or the enhanced attribute of general purpose partitions.

  CAVEAT EMPTOR: Partitioning eMMC devices is a one-time operation.

- Now that properly issuing CMD6 is crucial (so data isn't written to
  the wrong partition for example), make a step into the direction of
  correctly handling the timeout for these commands in the MMC layer.
  Also, do a SEND_STATUS when CMD6 is invoked with an R1B response as
  recommended by relevant specifications. However, quite some work is
  left to be done in this regard; all other R1B-type commands done by
  the MMC layer also should be followed by a SEND_STATUS (CMD13), the
  erase timeout calculations/handling as documented in specifications
  are entirely ignored so far, the MMC layer doesn't provide timeouts
  applicable up to the bridge drivers and at least sdhci(4) currently
  is hardcoding 1 s as timeout for all command types unconditionally.
  Let alone already available return codes often not being checked in
  the MMC layer ...

- Add an IOCTL interface to mmcsd(4); this is sufficiently compatible
  with Linux so that the GNU mmc-utils can be ported to and used with
  FreeBSD (note that due to the remaining deficiencies outlined above
  SANITIZE operations issued by/with `mmc` currently most likely will
  fail). These latter will be added to ports as sysutils/mmc-utils in
  a bit. Among others, the `mmc` tool of the GNU mmc-utils allows for
  partitioning eMMC devices (tested working).

- For devices following the eMMC specification v4.41 or later, year 0
  is 2013 rather than 1997; so correct this for assembling the device
  ID string properly.

- Let mmcsd.ko depend on mmc.ko. Additionally, bump MMC_VERSION as at
  least for some of the above a matching pair is required.

- In the ACPI front-end of sdhci(4) describe the Intel eMMC and SDXC
  controllers as such in order to match the PCI one.
  Additionally, in the entry for the 80860F14 SDXC controller remove
  the eMMC-only SDHCI_QUIRK_INTEL_POWER_UP_RESET.

OKed by:	imp
Submitted by:	ian (mmc_switch_status() implementation)
2017-03-16 22:23:04 +00:00
Fabien Thomas
d42aefee43 Fix arm stack frame walking support:
- Adjust stack offset for Clang
- Correctly fill registers for fake stack frame (soft PMC)

MFC after:	1 week
Sponsored by:	Stormshield
Differential Revision:	https://reviews.freebsd.org/D7396
2017-03-14 16:06:57 +00:00
Michal Meloun
ffeeb2ab3f Split overbloated machep.c to multiple files and do basic cleanup
of these fragments.
2017-03-11 07:07:41 +00:00
Marius Strobl
55dae242e6 Add and use a MMC_DECLARE_BRIDGE macro for declaring mmc(4) bridges
as kernel drivers and their dependency onto mmc(4); this allows for
incrementing the mmc(4) module version but also for entire omission
of these bridge declarations for mmccam(4) in a single place, i. e.
in dev/mmc/bridge.h.
2017-03-07 22:42:44 +00:00
Marius Strobl
b440e965da o Another round fixes for mmc(4), mmcsd(4) and sdhci(4) regarding
comments, marking unused parameters as such, style(9), whitespace,
  etc.
o In the mmc(4) bridges and sdhci(4) (bus) front-ends:
  - Remove redundant assignments of the default bus_generic_print_child
    device method (I've whipped these out of the tree as part of r227843
    once, but they keep coming back ...),
  - use DEVMETHOD_END,
  - use NULL instead of 0 for pointers.
o Trim/adjust includes.
2017-03-06 23:47:59 +00:00
Michal Meloun
d457839bc8 Add support for card detect and write protect gpio pins to Tegra SDHCI. 2017-03-05 15:34:32 +00:00
Oleksandr Tymoshenko
f1f425aea0 [rpi] rpi3 should use the same cpufreq logic as rpi2, not rpi-b
RPi3 cpufreq is more like that on RPi2. Setting arm frequency
above min (say, "sysctl hw.cpufreq.arm_freq=600000001") turns on
turbo mode, and the firmware automatically raises voltage, sets
frequency to max 1200MHz, and throttle when overheat, etc.

Swap if/else parts and use SOC_BCM2835 def so RPi3 can share the
same cpufreq logic as RPi2, instead of falling to that for RPi.

Submitted by:	Jia-Shiun Li <jiashiun@gmail.com>
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D9640
2017-03-04 17:34:36 +00:00
Ruslan Bukin
6fd86cf752 Add FPGA manager driver for Intel Arria 10.
With this driver we able to program FPGA core from FreeBSD system
running on ARM core.

Sponsored by:	DARPA, AFRL
2017-03-03 14:19:37 +00:00
Warner Losh
43b96a4eb5 Revert prior commit to restore the files mangled by my "fixing" merge
conflicts for a git rebase I tried to do.
2017-03-01 02:10:40 +00:00
Warner Losh
fbbd9655e5 Renumber copyright clause 4
Renumber cluase 4 to 3, per what everybody else did when BSD granted
them permission to remove clause 3. My insistance on keeping the same
numbering for legal reasons is too pedantic, so give up on that point.

Submitted by:	Jan Schaumann <jschauma@stevens.edu>
Pull Request:	https://github.com/freebsd/freebsd/pull/96
2017-02-28 23:42:47 +00:00
Ruslan Bukin
6414b02d0c Add SOC_ALTERA_* kernel options per each SoC and use it to
conditionally compile the code.

Reviewed by:	andrew
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D9836
2017-02-28 16:20:33 +00:00
Emmanuel Vadot
fd8516cc05 allwinner: A31: Add ccung driver
This adds clocks support for the aw_ccung on the A31 SoC.
Newer DTS files require this.
All the clocks except two CSI are defined and exported on the clock domain.
2017-02-28 15:44:21 +00:00
Emmanuel Vadot
b78b8251c9 allwinner: nkmp: Add MUX capability
Some NKMP clocks have a mux options.
Add the capability to aw_clk_nkmp.
2017-02-28 15:11:33 +00:00
Ruslan Bukin
428157830b Add support for Intel Arria 10 SoC Development Kit.
Use standard DTS files for SOCKIT and SOCDK.

Sponsored by:	DARPA, AFRL
2017-02-28 14:02:16 +00:00
Emmanuel Vadot
511d4e58f3 allwinner: NKMP clock: add update bit
The PLL_DDR clock have an update bit which need to be set after changing
the value, add the possibility to define one for NKMP clocks.

This allow us to add the missing clocks.
We now have the full list of clocks created under the clock domain.
2017-02-28 11:38:11 +00:00
Emmanuel Vadot
7a5603c04a allwinner: NM clock: Add value for fixed factor.
The register func for aw_clk_nm didn't copy the value needed for the fixed
factor, resulting in all fixed factor not working on NM clocks.
2017-02-28 11:05:45 +00:00
Ruslan Bukin
c214a270f5 Allow setting access-width for UART registers.
This is required for FDT's standard "reg-io-width" property
(similar to "reg-shift" property) found in many DTS files.

This fixes operation on Altera Arria 10 SOC Development Kit,
where standard ns8250 uart allows 4-byte access only.

Reviewed by:	kan, marcel
Sponsored by:	DARPA, AFRL
Differential Revision:	https://reviews.freebsd.org/D9785
2017-02-27 20:08:42 +00:00
Emmanuel Vadot
25d9f6e859 allwinner: Correct some clocks name for H3 CCU. 2017-02-27 17:12:17 +00:00
Emmanuel Vadot
a5ae21c50d allwinner: Order clocks by offset rather than by type for H3 ccu.
Also add a few more supported gates and add comments for which clocks
are missing.
2017-02-27 11:10:36 +00:00
Emmanuel Vadot
d7e3f295fa allwinner: Add support for lock and fractional mode on NM clock
Some PLL have a fractional mode and a lock bit.
Add support for it on the NM clock and export the clocks in the clkdom.
2017-02-27 08:58:27 +00:00
Emmanuel Vadot
f5d1d20574 Add clkng driver for Allwinner SoC
Since Linux 4.9-4.10 DTS doesn't have clocks under /clocks but only a ccu node.
Currently only H3 is supported with almost the same state as HEAD.
(video pll aren't supported for now but we don't support video).
This driver and clocks will also be used for other SoC (A64, A31, H5, H2 etc ...)

Reviewed by:	jmcneill
Differential Revision:	https://reviews.freebsd.org/D9517
2017-02-26 16:00:20 +00:00
Warner Losh
28586889c2 Convert PCIe Hot Plug to using pci_request_feature
Convert PCIe hot plug support over to asking the firmware, if any, for
permission to use the HotPlug hardware. Implement pci_request_feature
for ACPI. All other host pci connections to allowing all valid feature
requests.

Sponsored by: Netflix
2017-02-25 06:11:59 +00:00
Pedro F. Giffuni
ee7030f303 at91: double assignment.
Found with:	coccinelle (da.cocci)
Suggested by:	cognet
2017-02-23 23:48:44 +00:00
Ian Lepore
c5727c468f Revert to this driver's historic behavior: assume an sd card is writable
if the fdt data doesn't provide a gpio pin for reading the write protect
switch and also doesn't contain a "wp-disable" property.

In r311735 the long-bitrotted code in this driver for using the non-
standard fdt "mmchs-wp-gpio-pin" property was replaced with new common
support code for handling write-protect and card-detect gpio pins.  The
old code never found a property with that name, and the logic was to
assume that no gpio pin meant that the card was not write protected.

The new common code behaves differently.  If there is no fdt data saying
what to do about sensing write protect, the value in the standard SDHCI
PRESENT_STATE register is used.  On this hardware, if there is no signal
for write protect muxed into the sd controller then that bit in the
register indicates write protect.

The real problem here is the fdt data, which should contain "wp-disable"
properties for eMMC and micro-sd slots where write protect is not even
an option in the hardware, but we are not in control of that data, it
comes from linux.  So we have to make the same flawed assumption in our
driver that the corresponding linux driver has: no info means no protect.

Reported by:	several users on the arm@ list
Pointy hat:	me, for not testing enough before committing r311735
2017-02-22 03:49:46 +00:00
Ian Lepore
9063812353 Remove a variable that has been unused since r311735 (it should have been
removed as part of those changes).
2017-02-22 01:07:04 +00:00
Konstantin Belousov
901b55218f MFamd64 r313933: microoptimize pmap_protect_pte1().
Noted by:	alc
Tested by:	mmel
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2017-02-19 20:40:07 +00:00
Ian Lepore
5002d69f9b Change the naming of imx{5,6} gpio pins to exactly match the names used in
the chip reference manuals: GPIOn_IOnn.
2017-02-18 18:24:03 +00:00
Olivier Houchard
c7529864f6 Remove debugging code that was probably unused since before the arm code
was initially committed.

Reported by:	Alexandre Martins <alexandre.martins@stormshield.eu>
2017-02-13 20:51:08 +00:00
Ian Lepore
8148f4f3d5 Enable usb low and full speed devices connected to the imx6 root hubs.
This enables the PHY circuitry for UTMI+ level 2 and 3, and sets the
flag to tell the ehci code that the root hub has a transaction translator
in it.  For imx6 we can use the standard ehci_get_port_speed_portsc()
function to find out what speed device is connected to the port.
2017-02-12 00:52:22 +00:00
Ian Lepore
9fc7a59f2a Stop including sys/types.h from arm's machine/atomic.h, fix the places
where atomic.h was being included without ensuring that types.h (via
param.h) was included first, as required by atomic(9).
2017-02-11 01:07:46 +00:00
Emmanuel Vadot
58256cf76e Rename timer.c to a10_timer.c
Requested by: andrew
2017-02-07 19:28:32 +00:00
Andrew Turner
5267f6243d Add support for PLATFORM and PLATFORM_SMP to the Altera SOCFPGA SoC. This
will help with moving it to GENERIC.

Reviewed by:	br
Sponsored by:	ABT Systems Ltd
Differential Revision:	https://reviews.freebsd.org/D9461
2017-02-07 12:04:04 +00:00
Konstantin Belousov
3b7a388b3e Update arm and arm64 counters MD bits.
On arm64 use atomics.  Then, both arm and arm64 do not need a critical
section around update.  Replace all cpus loop by CPU_FOREACH().
This brings arm and arm64 counter(9) implementation closer to current
amd64, but being more RISC-y, arm* version cannot avoid atomics.

Reported by:	Alexandre Martins <alexandre.martins@stormshield.eu>
Reviewed by:	andrew
Tested by:	Alexandre Martins, andrew
Sponsored by:	The FreeBSD Foundation
MFC after:	2 weeks
2017-02-06 17:20:37 +00:00
Stanislav Galabov
59cd18b093 sys/arm/arm/identcpu-v4.c: fix identify_arm_cpu()
identify_arm_cpu() in sys/arm/arm/identcpu-v4.c incorrectly uses a
u_int8_t variable to store the result of cpu_get_control().
It should really use a u_int variable, the same way as done for cpu_ident()
in the same function, as both cpuid and control registers are 32-bit..
This issue causes users of identcpu-v4 to incorrectly report things such as
icache status (bit 12 in cpu control register) and basically anything
defined in bits above bit 7 :-)

Reviewed by:	manu
Sponsored by:	Smartcom - Bulgaria AD
Differential Revision:	https://reviews.freebsd.org/D9460
2017-02-06 14:58:24 +00:00
Konstantin Belousov
9fb10d635e Define the vm_ooffset_t and vm_pindex_t types as machine-independend.
The types are for the byte offset and page index in vm object.  They
are similar to off_t, which is defined as 64bit MI integer.  Using MI
definitions will allow to provide consistent MD values of vm
object-related maximum sizes.

Reviewed by:	alc
Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
2017-02-04 12:26:38 +00:00
Andrew Turner
c1a2c9314f Remove an old use of _ARM_ARCH_6, we are moving to using the standard
__ARM_ARCH >= 6 spelling.

Sponsored by:	ABT Systems Ltd
2017-02-03 11:47:57 +00:00
Andrew Turner
aa7dd0fb0e Only define atomic_fcmpset_long in the kernel. We may include
machine/atomic.h in userspace, however atomic_fcmpset_32 is unimplemented
there.

Sponsored by:	ABT Systems Ltd
2017-02-03 10:04:17 +00:00
Michal Meloun
93a065e749 Remake support for SMP kernel on UP cpu:
- Use new option SMP_ON_UP instead of (mis)using specific CPU type.
   By this, any SMP kernel can be compiled with SMP_ON_UP support.
 - Enable runtime detection of CPU multiprocessor extensions only
   if SMP_ON_UP option is used. In other cases (pure SMP or UP),
   statically compile only required variant.
 - Don't leak multiprocessor instructions to UP kernel.
 - Correctly handle data cache write back to point of unification.
   DCCMVAU is supported on all armv7 cpus.
 - For SMP_ON_UP kernels, detect proper TTB flags on runtime.

Differential Revision: https://reviews.freebsd.org/D9133
2017-02-02 06:14:44 +00:00
Oleksandr Tymoshenko
878097c10e [am335x] Fallback to standard video interface bindings when using Linux dts
Historically AM335x LCDC driver used non-standard "hdmi" property to
refer to HDMI framer. There is no such thing in upstream DTS, so to
handle both cases fallback to bindings described in
bindings/media/video-interfaces.txt in Linux documentation.

We still make some assumptions that are not universally true: we
assume that if remote endpoint is available it's going to be HDMI
framer. Which is true for AM335x-based devices currently supported
but may be not true for some custom hardware.

MFC after:	1 week
2017-02-01 22:03:59 +00:00
Olivier Houchard
4943dc2d2c Correct the IT instruction in atomic_fcmpset_64().
Reported by:	andrew
2017-01-29 13:31:56 +00:00
Olivier Houchard
8406f869f4 Remove useless labels. 2017-01-28 17:48:33 +00:00
Olivier Houchard
14dd14fc00 Use strexeq instead of needlessly branch.
Suggested by:	ian
2017-01-28 17:46:04 +00:00
Olivier Houchard
dc5f9fcdae Implement atomic_fcmpset_* for arm and arm64. 2017-01-28 16:24:06 +00:00
Ian Lepore
28b3a4a659 Configure the timer capture pin to input mode in the timer control
register, in addition to configuring it as input with the pinmux driver.

There was a control register bit commented as "no desc in datasheet".  A
later revision of the manual reveals the bit to be an input/output control
for the timer pin.  In addition to configuring capture or pulse mode, you
apparently have to separately configure the pin direction in the timer
control register.

Before this change, the timer block was apparently driving a signal onto a
pad configured by pinmux as input.  Capture mode still accidentally worked
for me during testing because I was using a very strong signal source that
just out-muscled the weaker drive from the misconfigured pin.
2017-01-27 04:08:24 +00:00